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參數資料
| 型號： | R5F3650NDFB |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, 0.50 MM PITCH, LQFP-100 |
| 文件頁數： | 73/81頁 |
| 文件大?。?/td> | 879K |
| 代理商： | R5F3650NDFB |
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91
4317K–AVR–03/2013
AT90PWM2/3/2B/3B
The setup of the OC0x should be performed before setting the Data Direction Register for the
port pin to output. The easiest way of setting the OC0x value is to use the Force Output Com-
pare (FOC0x) strobe bits in Normal mode. The OC0x Registers keep their values even when
changing between Waveform Generation modes.
Be aware that the COM0x1:0 bits are not double buffered together with the compare value.
Changing the COM0x1:0 bits will take effect immediately.
14.5
Compare Match Output Unit
The Compare Output mode (COM0x1:0) bits have two functions. The Waveform Generator uses
the COM0x1:0 bits for defining the Output Compare (OC0x) state at the next compare match.
Also, the COM0x1:0 bits control the OC0x pin output source. Figure 14-4 shows a simplified
schematic of the logic affected by the COM0x1:0 bit setting. The I/O Registers, I/O bits, and I/O
pins in the figure are shown in bold. Only the parts of the general I/O port control registers (DDR
and PORT) that are affected by the COM0x1:0 bits are shown. When referring to the OC0x
state, the reference is for the internal OC0x Register, not the OC0x pin. If a system reset occur,
the OC0x Register is reset to “0”.
Figure 14-4. Compare Match Output Unit, Schematic
The general I/O port function is overridden by the Output Compare (OC0x) from the Waveform
Generator if either of the COM0x1:0 bits are set. However, the OC0x pin direction (input or out-
put) is still controlled by the Data Direction Register (DDR) for the port pin. The Data Direction
Register bit for the OC0x pin (DDR_OC0x) must be set as output before the OC0x value is visi-
ble on the pin. The port override function is independent of the Waveform Generation mode.
The design of the Output Compare pin logic allows initialization of the OC0x state before the out-
put is enabled. Note that some COM0x1:0 bit settings are reserved for certain modes of
14.5.1
Compare Output Mode and Waveform Generation
The Waveform Generator uses the COM0x1:0 bits differently in Normal, CTC, and PWM modes.
For all modes, setting the COM0x1:0 = 0 tells the Waveform Generator that no action on the
OC0x Register is to be performed on the next compare match. For compare output actions in the
PORT
DDR
DQ
OCnx
Pin
OCnx
DQ
Waveform
Generator
COMnx1
COMnx0
0
1
DA
T
A
B
U
S
FOCn
clk
I/O
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相關代理商/技術參數 |
參數描述 |
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| R5F3650NDFB#U0 | 功能描述:MCU 4KB FLASH 512/16K 100-LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:M16C™ M16C/60/65 產品培訓模塊:CAN Basics Part-1 CAN Basics Part-2 Electromagnetic Noise Reduction Techniques Part 1 M16C Product Overview Part 1 M16C Product Overview Part 2 標準包裝:1 系列:M16C™ M32C/80/87 核心處理器:M32C/80 芯體尺寸:16/32-位 速度:32MHz 連通性:EBI/EMI，I²C，IEBus，IrDA，SIO，UART/USART 外圍設備:DMA，POR，PWM，WDT 輸入/輸出數:121 程序存儲器容量:384KB（384K x 8） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:24K x 8 電壓 - 電源 (Vcc/Vdd):3 V ~ 5.5 V 數據轉換器:A/D 34x10b，D/A 2x8b 振蕩器型:內部 工作溫度:-20°C ~ 85°C 封裝/外殼:144-LQFP 包裝:托盤 產品目錄頁面:749 (CN2011-ZH PDF) 配用:R0K330879S001BE-ND - KIT DEV RSK M32C/87 |
| R5F3650NNFA | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:RENESAS MCU |
| R5F3650NNFB | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:RENESAS MCU |
| R5F3650RDFA | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:RENESAS MCU |
| R5F3650RDFB | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:RENESAS MCU |
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