參數(shù)資料
型號: R5F3650MDFB
元件分類: 微控制器/微處理器
英文描述: MICROCONTROLLER, PQFP100
封裝: 14 X 14 MM, 0.50 MM PITCH, LQFP-100
文件頁數(shù): 6/81頁
文件大?。?/td> 879K
代理商: R5F3650MDFB
104
4317K–AVR–03/2013
AT90PWM2/3/2B/3B
15. 16-bit Timer/Counter1 with PWM
The 16-bit Timer/Counter unit allows accurate program execution timing (event management),
wave generation, and signal timing measurement. The main features are:
True 16-bit Design (i.e., Allows 16-bit PWM)
Two independent Output Compare Units
Double Buffered Output Compare Registers
One Input Capture Unit
Input Capture Noise Canceler
Clear Timer on Compare Match (Auto Reload)
Glitch-free, Phase Correct Pulse Width Modulator (PWM)
Variable PWM Period
Frequency Generator
External Event Counter
Four independent interrupt Sources (TOV1, OCF1A, OCF1B, and ICF1)
15.1
Overview
Most register and bit references in this section are written in general form. A lower case “n”
replaces the Timer/Counter number, and a lower case “x” replaces the Output Compare unit
channel. However, when using the register or bit defines in a program, the precise form must be
used, i.e., TCNT1 for accessing Timer/Counter1 counter value and so on.
A simplified block diagram of the 16-bit Timer/Counter is shown in Figure 15-1. For the actual
placement of I/O pins, refer to “Pin Descriptions” on page 5. CPU accessible I/O Registers,
including I/O bits and I/O pins, are shown in bold. The device-specific I/O Register and bit loca-
The PRTIM1 bit in “Power Reduction Register” on page 43 must be written to zero to enable
Timer/Counter1 module.
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