參數(shù)資料
型號: R5F364AENFA
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQFP100
封裝: 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100
文件頁數(shù): 10/92頁
文件大?。?/td> 736K
代理商: R5F364AENFA
R01DS0032EJ0200 Rev.2.00
Page 18 of 88
Feb 07, 2011
M16C/64A Group
3. Address Space
3.2
Memory Map
Special function registers (SFRs) are allocated from address 00000h to 003FFh and from 0D000h to
0D7FFh. Peripheral function control registers are located here. All blank areas within SFRs are reserved.
Do not access these areas.
Internal RAM is allocated from address 00400h and higher, with 10 KB of internal RAM allocated from
00400h to 02BFFh. Internal RAM is used not only for data storage, but also for the stack area when
subroutines are called or when an interrupt request is accepted.
The internal ROM is flash memory. Three internal ROM areas are available: data flash, program ROM 1,
and program ROM 2.
The data flash is allocated from 0E000h to 0FFFFh. This data flash area is mostly used for data storage, but
can also store programs.
Program ROM 2 is allocated from 10000h to 13FFFh. Program ROM 1 is allocated from FFFFFh and lower,
with the 64-KB program ROM 1 area allocated from address F0000h to FFFFFh.
The special page vectors are allocated from FFE00h to FFFD7h. They are used for the JMPS and JSRS
instructions. Refer to the M16C/60, M16C/20, M16C/Tiny Series Software Manual for details.
The fixed vector table for interrupts is allocated from FFFDCh to FFFFFh.
The 256 bytes beginning with the start address set in the INTB register compose the relocatable vector table
for interrupts.
Figure 3.2 shows the Memory Map.
Figure 3.2
Memory Map
Notes:
1. Do not access reserved areas.
2. The figure above applies under the following conditions:
- Memory expansion mode
- The PM10 bit in the PM1 register is 1
(addresses 0E000h to 0FFFFh are used as data flash)
- The PRG2C0 bit in the PRG2C register is 0 (program ROM 2 enabled)
- The PM13 bit in the PM1 register is 1
(all areas in internal RAM, and the program ROM 1 area from 80000h are usable)
3. Do not change the data from FFh.
Internal RAM
Reserved area (1)
00000h
XXXXXh
0D000h
SFR
00400h
SFR
0D800h
Internal ROM
(data flash)
0E000h
Internal ROM
(program ROM 2)
10000h
Reserved area (1)
Internal ROM
(program ROM 1)
14000h
80000h
YYYYYh
FFFFFh
Reserved area (1)
28000h
27000h
External area
Size
Address XXXXXh
Internal RAM
12 KB
033FFh
20 KB
053FFh
Special page vector table
FFFFFh
FFFDCh
FFE00h
FFFD8h
Reserved area (3)
256 bytes beginning with the
start address set in the INTB
register
Fixed vector table
Address for ID code stored
OFS1 address
Size
Address YYYYYh
Program ROM 1
128 KB
E0000h
256 KB
C0000h
Relocatable vector table
On-chip debugger
monitor area
13FFFh
13FF0h
13000h
User boot code area
31 KB
07FFFh
384 KB
512 KB
A0000h
80000h
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