參數(shù)資料
型號(hào): R5F35L30JFF
元件分類(lèi): 微控制器/微處理器
英文描述: 16-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP64
封裝: PLASTIC, LQFP-64
文件頁(yè)數(shù): 33/117頁(yè)
文件大?。?/td> 0K
代理商: R5F35L30JFF
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)當(dāng)前第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)
REJ03B0221-0100 Rev.1.00 Feb 08, 2010
Page 20 of 113
M16C/5L Group, M16C/56 Group
2. Central Processing Unit (CPU)
2.1
General Purpose Registers
2.1.1
Data Registers (R0, R1, R2, and R3)
The R0, R1, R2, and R3 are 16-bit registers used for transfer, arithmetic and logic operations. R0 and
R1 can be split into high-order (R0H/R1H) and low-order bits (R0L/R1L) to be used separately as 8-bit
data registers. R0 can be combined with R2 and used as a 32-bit data register (R2R0). The same
applies to R3R1.
2.1.2
Address Registers (A0 and A1)
A0 and A1 are 16-bit registers used for indirect addressing, relative addressing, transfer, arithmetic and
logic operations. A0 can be combined with A1 and used as a 32-bit address register (A1A0).
2.1.3
Frame Base Register (FB)
FB is a 16-bit register used for FB relative addressing.
2.1.4
Interrupt Table Register (INTB)
INTB is a 20-bit register that indicates the start address of a relocatable interrupt vector table.
2.1.5
Program Counter (PC)
PC is a 20-bit register that indicates the address of the next instruction to be executed.
2.1.6
User Stack Pointer (USP) and Interrupt Stack Pointer (ISP)
The stack pointers (SP), USP and ISP, each have 16 bits. The U flag is used to switch between USP
and ISP.
2.1.7
Static Base Register (SB)
SB is a 16-bit register used for SB-relative addressing.
2.1.8
Flag Register (FLG)
FLG is a 11-bit register that indicates the CPU state.
2.1.8.1
Carry Flag (C Flag)
The C flag retains a carry, borrow, or shift-out bit that has been generated by the arithmetic/logic unit.
2.1.8.2
Debug Flag (D Flag)
The D flag is for debugging purposes only. Set it to 0.
2.1.8.3
Zero Flag (Z Flag)
The Z flag becomes 1 when an arithmetic operation results in 0; otherwise it becomes 0.
2.1.8.4
Sign Flag (S Flag)
The S flag becomes 1 when an arithmetic operation results in a negative value; otherwise it becomes 0.
2.1.8.5
Register Bank Select Flag (B Flag)
Register bank 0 is selected when the B flag is 0. Register bank 1 is selected when this flag is 1.
相關(guān)PDF資料
PDF描述
R5F35636KFF 16-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP64
R5F35630KFF 16-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP64
R5F35L33JFF 16-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP64
R5F35L3EJFF 16-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP64
R5F3562EJFE 16-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP80
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
R5F35L30KFF 制造商:RENESAS 制造商全稱(chēng):Renesas Technology Corp 功能描述:RENESAS MCU
R5F35L33DFF 制造商:RENESAS 制造商全稱(chēng):Renesas Technology Corp 功能描述:RENESAS MCU
R5F35L33JFF 制造商:RENESAS 制造商全稱(chēng):Renesas Technology Corp 功能描述:RENESAS MCU
R5F35L33KFF 制造商:RENESAS 制造商全稱(chēng):Renesas Technology Corp 功能描述:RENESAS MCU
R5F35L36DFF 制造商:RENESAS 制造商全稱(chēng):Renesas Technology Corp 功能描述:RENESAS MCU