參數(shù)資料
型號: R5F213G4DDSP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 20 MHz, MICROCONTROLLER, PDSO24
封裝: 5.60 X 7.80 MM, 0.65 MM, PLASTIC, SSOP-24
文件頁數(shù): 37/45頁
文件大?。?/td> 521K
代理商: R5F213G4DDSP
R8C/3GD Group
5. Electrical Characteristics
REJ03B0289-0100 Rev.1.00
Feb 26, 2010
Page 40 of 41
i = 0, 2
Figure 5.14
Serial Interface Timing Diagram when VCC = 2.2 V
Notes:
1. When selecting the digital filter by the INTi input filter select bit, use an INTi input HIGH width of either (1/digital filter clock
frequency × 3) or the minimum value of standard, whichever is greater.
2. When selecting the digital filter by the INTi input filter select bit, use an INTi input LOW width of either (1/digital filter clock
frequency × 3) or the minimum value of standard, whichever is greater.
Figure 5.15
Input Timing for External Interrupt INTi and Key Input Interrupt KIi when Vcc = 2.2 V
Table 5.29
Serial Interface
Symbol
Parameter
Standard
Unit
Min.
Max.
tc(CK)
CLKi input cycle time
800
ns
tW(CKH)
CLKi input “H” width
400
ns
tW(CKL)
CLKi input “L” width
400
ns
td(C-Q)
TXDi output delay time
200
ns
th(C-Q)
TXDi hold time
0
ns
tsu(D-C)
RXDi input setup time
150
ns
th(C-D)
RXDi input hold time
90
ns
Table 5.30
External Interrupt INTi (i = 0, 1, 3) Input, Key Input Interrupt KIi (i = 0 to 3)
Symbol
Parameter
Standard
Unit
Min.
Max.
tW(INH)
INTi input “H” width, KIi input “H” width
1000 (1)
ns
tW(INL)
INTi input “L” width, KIi input “L” width
1000 (2)
ns
tW(CKH)
tC(CK)
tW(CKL)
th(C-Q)
th(C-D)
tsu(D-C)
td(C-Q)
CLKi
TXDi
RXDi
i = 0, 2
VCC = 2.2 V
tW(INL)
tW(INH)
INTi input
(i = 0, 1, 3)
KIi input
(i = 0 to 3)
VCC = 2.2 V
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