參數(shù)資料
型號(hào)： R5F2138CFJFP
元件分類(lèi)： 微控制器/微處理器
英文描述： FLASH, 20 MHz, MICROCONTROLLER, PQFP80
封裝： 12 X 12 MM, 0.50 MM PITCH, PLASTIC, LQFP-80
文件頁(yè)數(shù)： 26/30頁(yè)
文件大?。?/td> 483K
代理商： R5F2138CFJFP
84
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [DATASHEET]
8285E–AVR–02/2013
15. 8-bit Timer/Counter0 with PWM
15.1
Features
Single Compare Unit Counter
Clear Timer on Compare Match (auto reload)
Glitch-free, Phase Correct Pulse Width Modulator (PWM)
Frequency Generator
External Event Counter
10-bit Clock Prescaler
Overflow and Compare Match Interrupt Sources (TOV0 and OCF0A)
15.2
Overview
Timer/Counter0 is a general purpose, single compare unit, 8-bit Timer/Counter module. A simplified block diagram
is shown in Figure 15-1. For the actual placement of I/O pins, refer to ”P(pán)in configurations” on page 2. CPU accessi-
ble I/O Registers, including I/O bits and I/O pins, are shown in bold. The device-specific I/O Register and bit
locations are listed in the ”Register description” on page 93.
Figure 15-1. 8-bit Timer/Counter, block diagram.
15.2.1
Definitions
Many register and bit references in this section are written in general form. A lower case “n” replaces the
Timer/Counter number, in this case 0. A lower case “x” replaces the Output Compare unit number, in this case unit
A. However, when using the register or bit defines in a program, the precise form must be used, i.e., TCNT0 for
accessing Timer/Counter0 counter value and so on.
The definitions in Table 15-1 are also used extensively throughout the document.
Timer/Counter
D
ATA
B
U
S
=
TCNTn
Waveform
Generation
OCn
= 0
Control Logic
= 0xFF
BOTTOM
count
clear
direction
TOVn
(Int.Req.)
OCRn
TCCRn
Clock Select
Tn
Edge
Detector
( From Prescaler )
clkTn
TOP
OCn
(Int.Req.)
Table 15-1.
Timer/Counter definitions.
BOTTOM
The counter reaches the BOTTOM when it becomes 0x00.
MAX
The counter reaches its MAXimum when it becomes 0xFF (decimal 255).
TOP
The counter reaches the TOP when it becomes equal to the highest value in the count sequence.
The TOP value can be assigned to be the fixed value 0xFF (MAX) or the value stored in the
OCR0A Register. The assignment is dependent on the mode of operation.
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