參數(shù)資料
型號(hào)： R5F212J1SDSP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDSO20
封裝： 4.40 X 6.50 MM, 0.65 MM PITCH, PLASTIC LSSOP-20
文件頁數(shù)： 23/51頁
文件大?。?/td> 468K
代理商： R5F212J1SDSP
R8C/2H Group, R8C/2J Group
1. Overview
Rev.1.00
Mar 28, 2008
Page 3 of 65
REJ03B0217-0100
NOTE:
1. Specify the D version if D version functions are to be used.
Table 1.2
Specifications for R8C/2J Group
Item
Function
Specification
CPU
Central processing
unit
R8C/Tiny series core
Number of fundamental instructions: 89
Minimum instruction execution time:
125 ns (System clock = 8 MHz, VCC = 2.7 to 5.5 V)
250 ns (System clock = 4 MHz, VCC = 2.2 to 5.5 V)
Multiplier: 16 bits × 16 bits
→ 32 bits
Multiply-accumulate instruction: 16 bits × 16 bits + 32 bits
→ 32 bits
Operation mode: Single-chip mode (address space: 1 Mbyte)
Memory
ROM, RAM
Refer to Table 1.4 Product List for R8C/2J Group.
Power Supply
Voltage
Detection
Voltage detection
circuit
Power-on reset
Voltage detection 3
Comparator
2 circuits (shared with voltage monitor 1 and voltage monitor 2)
External reference voltage input is available
I/O Ports
CMOS I/O ports: 12, selectable pull-up resistor
Clock
Clock generation
circuits
1 circuits: On-chip oscillator (high-speed, low-speed)
(high-speed on-chip oscillator has a frequency adjustment function),
Frequency divider circuit: Dividing selectable 1, 2, 4, 8, and 16
Low power consumption modes:
Standard operating mode (high-speed on-chip oscillator, low-speed on-chip
oscillator), wait mode, stop mode
Interrupts
External: 3 sources, Internal: 14 sources, Software: 4 sources
Priority levels: 7 levels
Watchdog Timer
15 bits × 1 (with prescaler), reset start selectable
Timer
Timer RA
8 bits × 1 (with 8-bit prescaler)
Timer mode (period timer), pulse output mode (output level inverted every
period), event counter mode, pulse width measurement mode, pulse period
measurement mode
Timer RB
8 bits × 1 (with 8-bit prescaler)
Timer mode (period timer), programmable waveform generation mode (PWM
output), programmable one-shot generation mode, programmable wait one-
shot generation mode
Timer RE
Not implemented
Timer RF
16 bits × 1 (with capture/compare register pin and compare register pin)
Input capture mode, output compare mode
Serial
Interface
UART0
Clock synchronous serial I/O/UART × 1
LIN Module
Hardware LIN: 1 (timer RA, UART0)
Flash Memory
Programming and erasure voltage: VCC = 2.7 to 5.5 V
Programming and erasure endurance: 100 times
Program security: ROM code protect, ID code check
Debug functions: On-chip debug, on-board flash rewrite function
Operating Frequency/Supply
Voltage
System clock = 8 MHz (VCC = 2.7 to 5.5 V)
System clock = 4 MHz (VCC = 2.2 to 5.5 V)
Current consumption
5 mA (VCC = 5 V, system clock = 8 MHz)
23
A (VCC = 3 V, wait mode (low-speed on-chip oscillator on))
0.7
A (VCC = 3 V, stop mode, BGR trimming circuit disabled)
Operating Ambient Temperature
-20 to 85
°C (N version)
-40 to 85
Package
20-pin LSSOP
Package code: PLSP0020JB-A (previous code: 20P2F-A)
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參數(shù)描述
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