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參數(shù)資料
| 型號(hào)： | R5F212BASDFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PQFP48 |
| 封裝： | 10 X 10 MM, 0.50 MM PITCH, PLASTIC, LQFP-48 |
| 文件頁(yè)數(shù)： | 23/138頁(yè) |
| 文件大?。?/td> | 492K |
| 代理商： | R5F212BASDFP |
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206
4317K–AVR–03/2013
AT90PWM2/3/2B/3B
when the Transmit Shift Register and Transmit Buffer Register do not contain data to be trans-
mitted. When disabled, the Transmitter will no longer override the TxDn port.
This bit is available for both USART and EUSART mode.
Bit 2 – UCSZ2: Character Size
The UCSZ2 bits combined with the UCSZ1:0 bit in UCSRC sets the number of data bits (Char-
acter SiZe) in a frame the Receiver and Transmitter use.
This bit have no effect when the EUSART mode is enabled.
Bit 1 – RXB8: Receive Data Bit 8
RXB8 is the ninth data bit of the received character when operating with serial frames with nine
data bits. Must be read before reading the low bits from UDR.
When the EUSART mode is enable and configured in 17 bits receive mode, this bit contains the
seventeenth bit (see EUSART section).
Bit 0 – TXB8: Transmit Data Bit 8
TXB8 is the ninth data bit in the character to be transmitted when operating with serial frames
with nine data bits. Must be written before writing the low bits to UDR.
When the EUSART mode is enable and configured in 17 bits transmit mode, this bit contains the
seventeenth bit (See EUSART section).
18.10.4
USART Control and Status Register C – UCSRC
Bit 7 – Reserved Bit
This bit is reserved for future use. For compatibilty with future devices, this bit must be written to
zero when USCRC is written.
Bit 6 – UMSEL: USART Mode Select
This bit selects between asynchronous and synchronous mode of operation.
When configured in EUSART mode, the synchronous mode should not be set with Manchester
mode (See EUSART section).
Bit 5:4 – UPM1:0: Parity Mode
These bits enable and set type of parity generation and check. If enabled, the Transmitter will
automatically generate and send the parity of the transmitted data bits within each frame. The
Receiver will generate a parity value for the incoming data and compare it to the UPM setting. If
a mismatch is detected, the UPE Flag in UCSRA will be set.
Bit
76543210
-
UMSEL0
UPM1
UPM0
USBS
UCSZ1
UCSZ0
UCPOL
UCSRC
Read/Write
R/W
Initial Value
00000110
Table 18-4.
UMSEL Bit Settings
UMSEL
Mode
0
Asynchronous Operation
1
Synchronous Operation
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| R5F212BASDFP#U0 | 制造商:Renesas Electronics Corporation 功能描述:MCU 16-Bit R8C CISC 96KB Flash 2.5V/3.3V/5V 64-Pin LQFP 制造商:Renesas Electronics Corporation 功能描述:MCU 16-bit R8C CISC 96KB Flash 2.5V/3.3V/5V 64-Pin LQFP |
| R5F212BASDFP#V0 | 功能描述:IC R8C/2B MCU FLASH 64LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:R8C/2x/2B 標(biāo)準(zhǔn)包裝:250 系列:56F8xxx 核心處理器:56800E 芯體尺寸:16-位 速度:60MHz 連通性:CAN，SCI，SPI 外圍設(shè)備:POR，PWM，溫度傳感器，WDT 輸入/輸出數(shù):21 程序存儲(chǔ)器容量:40KB（20K x 16） 程序存儲(chǔ)器類型:閃存 EEPROM 大小:- RAM 容量:6K x 16 電壓 - 電源 (Vcc/Vdd):2.25 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 6x12b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 125°C 封裝/外殼:48-LQFP 包裝:托盤(pán) 配用:MC56F8323EVME-ND - BOARD EVALUATION MC56F8323 |
| R5F212BASDFP#V2 | 制造商:Renesas Electronics Corporation 功能描述:R8C/2B 96+2/7 64LQFP 10X10 -40 制造商:Renesas Electronics Corporation 功能描述:R8C/2B 96+2/7 64LQFP 10X10 -40 TO +85 - Trays 制造商:Renesas Electronics Corporation 功能描述:IC MCU 16BIT 96KB FLASH 64LQFP |
| R5F212BASDXXXFA | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:RENESAS MCU R8C FAMILY / R8C/2x SERIES |
| R5F212BASDXXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:RENESAS MCU R8C FAMILY / R8C/2x SERIES |
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