參數(shù)資料
型號: R5F212B8SNLG
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PBGA64
封裝: 6 X 6 MM, 0.65 MM PITCH, PLASTIC, TFLGA-64
文件頁數(shù): 50/64頁
文件大?。?/td> 555K
代理商: R5F212B8SNLG
R8C/2A Group, R8C/2B Group
5. Electrical Characteristics
Rev.2.10
Nov 26, 2007
Page 54 of 60
REJ03B0182-0210
i = 0 to 2
Figure 5.16
Serial Interface Timing Diagram when VCC = 3 V
NOTES:
1.
When selecting the digital filter by the INTi input filter select bit, use an INTi input HIGH width of either (1/digital filter clock
frequency × 3) or the minimum value of standard, whichever is greater.
2.
When selecting the digital filter by the INTi input filter select bit, use an INTi input LOW width of either (1/digital filter clock
frequency × 3) or the minimum value of standard, whichever is greater.
Figure 5.17
External Interrupt INTi Input Timing Diagram when VCC = 3 V
Table 5.28
Serial Interface
Symbol
Parameter
Standard
Unit
Min.
Max.
tc(CK)
CLKi input cycle time
300
ns
tW(CKH)
CLKi input “H” width
150
ns
tW(CKL)
CLKi Input “L” width
150
ns
td(C-Q)
TXDi output delay time
80
ns
th(C-Q)
TXDi hold time
0
ns
tsu(D-C)
RXDi input setup time
70
ns
th(C-D)
RXDi input hold time
90
ns
Table 5.29
External Interrupt INTi (i = 0, 2, 3) Input
Symbol
Parameter
Standard
Unit
Min.
Max.
tW(INH)
INT0 input “H” width
ns
tW(INL)
INT0 input “L” width
ns
tW(CKH)
tC(CK)
tW(CKL)
th(C-Q)
th(C-D)
tsu(D-C)
td(C-Q)
CLKi
TXDi
RXDi
VCC = 3 V
i = 0 to 2
INTi
input
tW(INL)
tW(INH)
VCC = 3 V
i = 0, 2, 3
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