參數(shù)資料
型號： R5F21248SNXXXFP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP52
封裝： 10 X 10 MM, 0.65 MM PITCH, PLASTIC, LQFP-52
文件頁數(shù)： 8/61頁
文件大?。?/td> 529K
代理商： R5F21248SNXXXFP
R8C/24 Group, R8C/25 Group
2. Central Processing Unit (CPU)
Rev.3.00
Feb 29, 2008
Page 14 of 51
REJ03B0117-0300
2.1
Data Registers (R0, R1, R2, and R3)
R0 is a 16-bit register for transfer, arithmetic, and logic operations. The same applies to R1 to R3. R0 can be split
into high-order bits (R0H) and low-order bits (R0L) to be used separately as 8-bit data registers. R1H and R1L are
analogous to R0H and R0L. R2 can be combined with R0 and used as a 32-bit data register (R2R0). R3R1 is
analogous to R2R0.
2.2
Address Registers (A0 and A1)
A0 is a 16-bit register for address register indirect addressing and address register relative addressing. It is also
used for transfer, arithmetic, and logic operations. A1 is analogous to A0. A1 can be combined with A0 and as a 32-
bit address register (A1A0).
2.3
Frame Base Register (FB)
FB is a 16-bit register for FB relative addressing.
2.4
Interrupt Table Register (INTB)
INTB is a 20-bit register that indicates the start address of an interrupt vector table.
2.5
Program Counter (PC)
PC is 20 bits wide and indicates the address of the next instruction to be executed.
2.6
User Stack Pointer (USP) and Interrupt Stack Pointer (ISP)
The stack pointers (SP), USP, and ISP, are each 16 bits wide. The U flag of FLG is used to switch between
USP and ISP.
2.7
Static Base Register (SB)
SB is a 16-bit register for SB relative addressing.
2.8
Flag Register (FLG)
FLG is an 11-bit register indicating the CPU state.
2.8.1
Carry Flag (C)
The C flag retains carry, borrow, or shift-out bits that have been generated by the arithmetic and logic unit.
2.8.2
Debug Flag (D)
The D flag is for debugging only. Set it to 0.
2.8.3
Zero Flag (Z)
The Z flag is set to 1 when an arithmetic operation results in 0; otherwise to 0.
2.8.4
Sign Flag (S)
The S flag is set to 1 when an arithmetic operation results in a negative value; otherwise to 0.
2.8.5
Register Bank Select Flag (B)
Register bank 0 is selected when the B flag is 0. Register bank 1 is selected when this flag is set to 1.
2.8.6
Overflow Flag (O)
The O flag is set to 1 when an operation results in an overflow; otherwise to 0.
相關(guān)PDF資料
PDF描述
R5F21245SDFP 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP52
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
R5F21248SNXXXLG 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MCU
R5F21248SYXXXFP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MCU
R5F21248SYXXXLG 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MCU
R5F21254SDFP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:RENESAS 16-BIT SINGLE-CHIP MCU R8C FAMILY / R8C/2x SERIES
R5F21254SDFP#U0 功能描述:IC R8C MCU FLASH 52LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:R8C/2x/25 產(chǎn)品培訓(xùn)模塊:MCU Product Line Introduction AVR® UC3 Introduction 標(biāo)準包裝:2,500 系列:AVR®32 UC3 B 核心處理器:AVR 芯體尺寸:32-位 速度:60MHz 連通性:I²C，IrDA，SPI，SSC，UART/USART，USB 外圍設(shè)備:欠壓檢測/復(fù)位，DMA，POR，PWM，WDT 輸入/輸出數(shù):28 程序存儲器容量:128KB（128K x 8） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:32K x 8 電壓 - 電源 (Vcc/Vdd):1.65 V ~ 1.95 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 6x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:48-TQFP 包裝:帶卷 (TR) 配用:ATSTK600-TQFP48-ND - STK600 SOCKET/ADAPTER 48-TQFPATAVRONEKIT-ND - KIT AVR/AVR32 DEBUGGER/PROGRMMRATEVK1101-ND - KIT DEV/EVAL FOR AVR32 AT32UC3B 其它名稱:AT32UC3B1128-AUR-NDAT32UC3B1128-AURTR
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