
R8C/1A Group, R8C/1B Group
12. Interrupts
Rev.1.30
Dec 08, 2006
Page 80 of 315
REJ09B0252-0130
12.1.3
Special Interrupts
Special interrupts are non-maskable.
12.1.3.1
Watchdog Timer Interrupt
The watchdog timer interrupt is generated by the watchdog timer. Reset the watchdog timer after the watchdog
12.1.3.2
Oscillation Stop Detection Interrupt
The oscillation stop detection interrupt is generated by the oscillation stop detection function. For details of the
12.1.3.3
Voltage Monitor 2 Interrupt
The voltage monitor 2 interrupt is generated by the voltage detection circuit. For details of the voltage detection
12.1.3.4
Single-Step Interrupt, and Address Break Interrupt
Do not use these interrupts. They are for use by development tools only.
12.1.3.5
Address Match Interrupt
The address match interrupt is generated immediately before executing an instruction that is stored at an
address indicated by registers RMAD0 to RMAD1 when the AIER0 or AIER1 bit in the AIER register is set to
1 (address match interrupt enable). For details of the address match interrupt, refer to 12.4 Address Match 12.1.4
Peripheral Function Interrupt
The peripheral function interrupt is generated by the internal peripheral function of the MCU and is a maskable
details of peripheral functions, refer to the descriptions of individual peripheral functions.