IPD
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� R5F100BGANA#V0
寤犲晢锛� Renesas Electronics America
鏂囦欢闋佹暩(sh霉)锛� 296/395闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� MCU 16BIT 128KB FLASH 32WQFN
鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� RL78 ADC
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 1
绯诲垪锛� RL78/G13
鏍稿績铏曠悊鍣細 RL78
鑺珨灏哄锛� 16-浣�
閫熷害锛� 32MHz
閫i€氭€э細 CSI锛孖²C锛孡IN锛孶ART/USART
澶栧湇瑷�(sh猫)鍌欙細 DMA锛孭OR锛孭WM锛學DT
杓稿叆/杓稿嚭鏁�(sh霉)锛� 22
绋嬪簭瀛樺劜鍣ㄥ閲忥細 128KB锛�128K x 8锛�
绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 闁冨瓨
RAM 瀹归噺锛� 12K x 8
闆诲 - 闆绘簮 (Vcc/Vdd)锛� 1.65 V ~ 5.5 V
鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� A/D 8x8/10b
鎸暕鍣ㄥ瀷锛� 鍏�(n猫i)閮�
宸ヤ綔婧害锛� -40°C ~ 85°C
灏佽/澶栨锛� 32-WFQFN 瑁搁湶鐒婄洡
鍖呰锛� 鎵樼洡
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PIC18F6525/6621/8525/8621
DS39612B-page 364
2005 Microchip Technology Inc.
FIGURE 28-15:
IPD vs. VDD (SLEEP MODE, ALL PERIPHERALS DISABLED)
FIGURE 28-16:
TYPICAL AND MAXIMUM
IBOR vs. VDD OVER TEMPERATURE,
VBOR = 2.00-2.16V
0.01
0.1
1
10
100
1000
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
VDD (V)
IPD
(u
A
)
Max
(-40掳C to +125掳C)
Typ (25掳C)
Max
(85掳C)
Typical:
statistical mean @ 25掳C
Maximum: mean + 3
蟽 (-40掳C to +125掳C)
Minimum:
mean 鈥� 3
蟽 (-40掳C to +125掳C)
0
50
100
150
200
250
300
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
VDD (V)
IDD
(u
A)
Max (+125掳C)
Max (+85掳C)
Typ (+25掳C)
Device
Held in
Reset
Device
in Sleep
Typical:
statistical mean @ 25掳C
Maximum: mean + 3
蟽 (-40掳C to +125掳C)
Minimum:
mean 鈥� 3
蟽 (-40掳C to +125掳C)
鐩搁棞(gu膩n)PDF璩囨枡
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