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參數(shù)資料
| 型號： | R5107G441A-TR-F |
| 廠商： | RICOH COMPANY LTD |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8 |
| 封裝： | ROHS COMPLIANT, SSOP-8 |
| 文件頁數(shù)： | 1/2頁 |
| 文件大小： | 322K |
| 代理商： | R5107G441A-TR-F |
R5107G Series
Watchdog Timer Equipped with Manual Reset with VD
No.EK-170-091101
CMOS Microprocessor Supervisory
The R5107G Series are CMOS-based system power ICs with a voltage detector (VD) and watchdog timer (WDT) integrated in a single chip.
R5107G monitors the power system of devices equipped with microprocessors and prevents system runaway with a reset signal when a
malfunction occurs. The output delay time of the VD and watchdog timeout period/reset time can be adjusted with an external capacitor
with a high degree of accuracy. The R5107G is equipped with the function that inhibits clock monitoring of the WDT (INH) and manual reset
(MR) that also stops the VD.
FEATURES
Supply Current (I
SS
) Typ. 11
μA (VDD=-VDET+0.5V,
Clock pulse input)
Operating Voltage Range (V
DD
) 0.9V to 6.0V
(VD Section)
Detector Threshold Range (-V
DET
) 1.5V to 5.5V (internally fixed)
Detector Threshold Accuracy ± 1%
Temp. coeff. of Detector Threshold Typ. ± 100ppm/°C
Output Delay Time (t
PLH
) Typ. 370ms (CD=0.1
μF)
Output Delay Time Accuracy ± 16% (-40°C <= Topt <= 105°C)
(WDT Section)
Watchdog Timeout Period(t
WD
) Typ. 310ms (CTW=0.1
μF)
Reset Hold Time of WDT(t
WR
) Typ. 34ms (CTW=0.1
μF)
Watchdog Timeout Period Accuracy ± 33% (-40°C <= Topt <= 105°C)
PackageSSOP-8G
(The above shows specification at Topt=25°C. Design assurance value at -40°C <
= Topt <
= 105°C is also available. For details, please refer to the datasheet.)
BLOCK DIAGRAMS
TYPICAL APPLICATION
R5107Gxx1A
(Nch. open drain output)
VDD
GND
SCK
CTW
WATCHDOG
TIMER
CLOCK
DETECTOR
RESETB
INH
MR
CD
Vref1
Vref2
R5107Gxx1C
(CMOS output)
VDD
GND
SCK
CTW
WATCHDOG
TIMER
CLOCK
DETECTOR
RESETB
INH
MR
CD
Vref1
Vref2
R5107Gxx1A
Series
CD
VDD
RESET
I/O
R
CTW
GND
VDD
CD
RESETB
SCK
CTW
8
3
4
7
1
5
Microprocessor
Power Supply
SW
6
2
SW
INH
MR
SELECTION GUIDE
Package
Quantity per Reel
Part No.
SSOP-8G
3,000 pcs
R5107G.xx.1.
-TR-F
.xx. : Specify the detector threshold within the range 1.5V (.15.) to 5.5V (.55.)
in 0.1V steps.
.. : Select the output type from (.A.) Nch. open drain or (.C.) CMOS.
PACKAGE (Top View)
TIMING CHART
SSOP-8G
1
8
2
7
3
6
4
5
1
RESETB
Output pin for Reset "L" signal
2
MR
Manual reset pin
3
CD
Ext. Cap. pin for setting output
delay time of VD
4
GND
Ground pin
5
SCK
Watchdog timer clock input pin
6
INH
Inhibit pin
7
CTW
Ext. Cap. pin for setting reset and
watchdog timeout period of WDT
8
VDD
Power supply pin
APPLICATION
Monitoring of the power system of devices equipped with microprocessors
-VDET
+VDET
VRESETB
VCTW
VSCK
VDD
Vref2H
Vref2L
tPLH
VCD
tPHL
-VTCD
+VTCD
VINH
VMR
tWD
tWDI
tWD
tPLH
tWR
tPHL
tMR
tPHL : Output delay time
tWDI : tWD/10 (SCK pulses input during this period are ignored.)
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