參數(shù)資料
型號(hào)： R2033T-E2
廠(chǎng)商： RICOH COMPANY LTD
元件分類(lèi)： XO, clock
英文描述： 3 wire interface Real-Time Clock ICs
中文描述： 0 TIMER(S), REAL TIME CLOCK, PDSO10
封裝： 4 X 2.90 MM, 1 MM HEIGHT, TSSOP-10
文件頁(yè)數(shù)： 1/50頁(yè)
文件大?。?/td> 542K
代理商： R2033T-E2
R2033K /T
3 wire interface Real-Time Clock ICs
NO.EA-120-070221
1
OUTLINE
The R2033K/T is a CMOS real-time clock IC connected to the CPU by three signal lines, CE, SCLK, SIO, and
configured to perform serial transmission of time and calendar data to the CPU. The periodic interrupt circuit is
configured to generate interrupt signals with six selectable interrupts ranging from 0.5 seconds to 1 month. The
2 alarm interrupt circuits generate interrupt signals at preset times. As the oscillation circuit is driven under
constant voltage, fluctuation of the oscillator frequency due to supply voltage is small, and the time keeping
current is small (TYP. 0.45
μ
A at 3V). The oscillation halt sensing circuit can be used to judge the validity of
internal data in such events as power-on; The supply voltage monitoring circuit is configured to record a drop in
supply voltage below two selectable supply voltage monitoring threshold settings. The 32.768kHz clock output
function (CMOS output with control pin) is intended to output sub-clock pulses for the external microcomputer.
The oscillation adjustment circuit is intended to adjust time counts with high precision by correcting deviations in
the oscillation frequency of the crystal oscillator. Since the package for these ICs are TSSOP10G (4.0x2.9x1.0:
R2033T) or FFP12 (2.0x2.0x1.0: R2033K), high density mounting of ICs on boards is possible.
FEATURES
Minimum Timekeeping supply voltage TYP:0.66 to 5.5v (Worst: 1.00V to 5.5v); VDD pin
Low power consumption
0.45
μ
A TYP at VDD=3V (1.00
μ
A MAX.)
Three signal lines (CE, SCLK, SIO) required for connection to the CPU.
(Maximum clock frequency of 1MHz (with V
DD
= 3V) )
Time counters (counting hours, minutes, and seconds) and calendar counters (counting years, months, days,
and weeks) (in BCD format)
Interrupt circuit configured to generate interrupt signals (with interrupts ranging from 0.5 seconds to 1 month)
to the CPU and provided with an interrupt flag and an interrupt halt
2 alarm interrupt circuits (Alarm_W for week, hour, and minute alarm settings and Alarm_D for hour and
minute alarm settings)
With Power-on flag to prove that the power supply starts from 0V
32-kHz clock output pin (CMOS push-pull output with control pin)
Supply voltage monitoring circuit with two supply voltage monitoring threshold settings
Automatic identification of leap years up to the year 2099
Selectable 12-hour and 24-hour mode settings
High precision oscillation adjustment circuit
Built-in oscillation stabilization capacitors (CG and CD)
Package TSSOP10G (4.0mm x 2.9mm x 1.0mm: R2033T) FFP12 (2.0mm x 2.0mm x 1.0mm: R2033K)
CMOS process
相關(guān)PDF資料
PDF描述
R2033K 3 wire interface Real-Time Clock ICs
R2033K-E2 3 wire interface Real-Time Clock ICs
R2033T 3 wire interface Real-Time Clock ICs
R2043T 4-wire Serial Interface
R2043T-E2 4-wire Serial Interface
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