參數(shù)資料
型號(hào): R1LP0408C
廠商: Hitachi,Ltd.
英文描述: Wide Temperature Range Version 4 M SRAM (512-kword 】 8-bit)
中文描述: 寬溫版本四米的SRAM(512 - KWord的】8位)
文件頁(yè)數(shù): 12/14頁(yè)
文件大?。?/td> 78K
代理商: R1LP0408C
R1LP0408C-I Series
Rev.1.00, Aug.01.2003, page 12 of 13
Low V
CC
Data Retention Characteristics
(Ta =
40 to +85
°
C)
Parameter
Symbol Min Typ*
4
Max Unit Test conditions*
3
V
CC
for data retention
Data retention
current
V
DR
I
CCDR
*
2
20
V
μ
A
CS#
V
CC
0.2 V, Vin
0 V
V
= 3.0 V, Vin
0 V
CS#
V
CC
0.2 V
to +85
°
C
1
to +40
°
C
20
°
C to +25
°
C
I
CCDR
*
I
CCDR
*
I
CCDR
*
I
CCDR
*
I
CCDR
*
t
CDR
t
R
2
0
1.0
10
μ
A
μ
A
1
10
2
1.0
3
1
0.8
10
2
0.8
3
Chip deselect to data retention time
ns
See retention waveform
Operation recovery time
Notes: 1. This characteristic is guaranteed only for L version.
2. This characteristic is guaranteed only for SL version.
3. CS# controls address buffer, WE# buffer, OE# buffer, and Din buffer. In data retention mode,
Vin levels (address, WE#, OE#, I/O) can be in the high impedance state.
4. Typical values are at V
CC
= 3.0 V, Ta = +25
°
C and specified loading, and not guaranteed.
5. t
RC
= read cycle time.
t
RC
*
5
ns
Low V
CC
Data Retention Timing Waveform
(CS# Controlled)
V
CC
4.5 V
2.4 V
V
DR
0 V
CS#
t
CDR
t
R
CS#
V
CC
0.2 V
Data retention mode
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