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參數(shù)資料
| 型號(hào)： | R1118N391B-TR-FE |
| 廠商： | RICOH COMPANY LTD |
| 元件分類： | 固定正電壓單路輸出LDO穩(wěn)壓器 |
| 英文描述： | 3.9 V FIXED POSITIVE LDO REGULATOR, 0.37 V DROPOUT, PDSO5 |
| 封裝： | HALOGEN FREE AND ROHS COMPLIANT, SOT-23, 5 PIN |
| 文件頁數(shù)： | 19/22頁 |
| 文件大?。?/td> | 496K |
| 代理商： | R1118N391B-TR-FE |
R1118x
6
Dropout Voltage by Output Voltage
Topt
=25°C
The specification in
is checked and guaranteed by design engineering at
40°C <
= Topt <
= 85°C, unless
otherwise noted.
TYPICAL APPLICATION
C1
R1118x
Series
VDD
VOUT
CE
GND
C2
VOUT
(External Components)
Ceramic Capacitor C2 1.0
μF TDK
C1005JB0J105K
Kyocera CM05X5R105K06AB
TECHNICAL NOTES
When using these ICs, consider the following points:
Phase Compensation
In these ICs, phase compensation is made for securing stable operation even if the load current is varied. For
this purpose, use a capacitor C2 with 1.0
μF or more.
If a tantalum capacitor is used, and its ESR (Equivalent Series Resistance) of C2 is large, the loop oscillation
may result. Because of this, select C2 carefully considering its frequency characteristics.
PCB Layout
Make VDD and GND lines sufficient. If their impedance is high, noise pickup or unstable operation may result.
Connect a capacitor C1 with a capacitance value as much as 1.0
μF or more between VDD and GND pin, and as
close as possible to the pins.
Set external components, especially the output capacitor C2, as close as possible to the ICs, and make wiring
as short as possible.
Dropout Voltage VDIF (V)
Output Voltage
VOUT (V)
Condition
Typ.
Max.
0.8 <
= VOUT < 0.9
0.82
1.06
0.9 <
= VOUT < 1.0
0.74
0.98
1.0 <
= VOUT < 1.2
0.66
0.90
1.2 <
= VOUT < 1.5
0.54
0.77
1.5 <
= VOUT < 2.0
0.45
0.64
2.0 <
= VOUT < 2.8
0.34
0.49
2.8 <
= VOUT
IOUT
=150mA
0.27
0.37
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