
Since the IC operates in a burst mode, almost
all the power is consumed during the course of
each burst. During the time between bursts the
sensor is quiescent.
3.4.1 M
EASURING
 S
UPPLY
 C
URRENT
Measuring average power consumption is a
fairly difficult task, due to the burst nature of
the device’s operation. Even a good quality
RMS DMM will have difficulty tracking the
relatively slow burst rate.
The simplest method for measuring average
current is to replace the power supply with a
large value low-leakage electrolytic capacitor,
for example
2,700μF. 'Soak' the capacitor by
connecting it to a bench supply at the desired
operating voltage for 24 hours to form the
electrolyte and reduce leakage to a minimum.
Connect the capacitor to the circuit at T=0,
making sure there will be no detections during
the measurement interval; at T=30 seconds measure the
capacitor's voltage with a DMM. Repeat the test without a
load to measure the capacitor's internal leakage, and
subtract the internal leakage result from the voltage droop
measured during the QT110 load test. Be sure the DMM is
connected only at the end of each test, to prevent the DMM's
impedance from contributing to the capacitor's discharge.
Supply drain can be calculated from the adjusted voltage
droop using the basic charge equation:
i
 =
VC
t
where C is the large supply cap value, t is the elapsed
measurement time in seconds, and 
V is the adjusted
voltage droop on C.
3.4.2 ESD 
PROTECTION
In cases where the electrode is placed behind a dielectric
panel, the IC will be protected from direct static discharge.
However, even with a panel, transients can still flow into the
electrode via induction, or in extreme cases, via dielectric
breakdown. Porous materials may allow a spark to tunnel
right through the material; partially conducting materials like
'pink poly' will conduct the ESD right to the electrode. Testing
is required to reveal any problems. The device does have
diode protection on its terminals which can absorb and
protect the device from most induced discharges, up to
20mA; the usefulness of the internal clamping will depending
on the dielectric properties, panel thickness, and rise time of
the ESD transients.
ESD dissipation can be aided further with an added diode
protection network as shown in Figure 2-7, in extreme cases.
Because the charge and transfer times of the QT110 are
relatively long, the circuit can tolerate very large values of Re,
more than 100k ohms in most cases where electrode Cx is
small. The added diodes shown (1N4150, BAV99 or
equivalent low-C diodes) will shunt the ESD transients away
from the part, and Re1 will current limit the rest into the
QT110's own internal clamp diodes. C1 should be around
10μF if it is to absorb positive transients from a human body
model standpoint without rising in value by more than 1 volt.
If desired C1 can be replaced with an appropriate zener
diode. 
Directly placing semiconductor transient protection
devices or MOV's on the sense lead is not advised; these
devices have extremely large amounts of parasitic C which will
swamp the IC.
Re1 should be as large as possible given the load value of
Cx and the diode capacitances of D1 and D2. Re1 should be
low enough to permit at least 6 timeconstants of RC to occur
during the charge and transfer phases.
Re2 functions to isolate the transient from the Vdd pin;
values of around 1K ohms are reasonable.
As with all ESD protection networks, it is crucial that the
transients be led away from the circuit. PCB ground layout is
crucial; the ground connections to D1, D2, and C1 should all
go back to the power supply ground or preferably, if
available, a chassis ground connected to earth. The currents
should not be allowed to traverse the area directly under the
IC.
If the device is connected to an external circuit via a cable or
long twisted pair, it is possible for ground-bounce to cause
damage to the Out pin; even though the transients are led
away from the IC itself, the connected signal or power ground
line will act as an inductor, causing a high differential voltage
to build up on the Out wire with respect to ground. If this is a
possibility, the Out pin should have a resistance Re3 in
series with it to limit current; this resistor should be as large
as can be tolerated by the load.
- 8 -
Figure 2-7  ESD Protection
3
4
6
5
1
+2.5 to 5
7
2
OUT
OPT1
OPT2
GAIN
SNS1
SNS2
Vss
8
Vdd
R
C
D
D
R
R
e3
s
2
1
e2
e1
   SENSING
ELECTRODE
10μF
+
C1