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參數(shù)資料
| 型號(hào)： | QS5805ATQ |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | LOW SKEW CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20 |
| 封裝： | QSOP-20 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大?。?/td> | 94K |
| 代理商： | QS5805ATQ |
1
QS5805T/AT/BT
GUARANTEEDLOWSKEWCMOSCLOCKDRIVER/BUFFER
INDUSTRIALTEMPERATURERANGE
JULY 2000
1999
Integrated Device Technology, Inc.
DSC-5267
c
QS5805T/AT/BT
ADVANCE
INFORMATION
INDUSTRIAL TEMPERATURE RANGE
GUARANTEED LOW SKEW
CMOS CLOCK
DRIVER/BUFFER
FUNCTIONAL BLOCK DIAGRAM
OEA
INA
INB
OA 5
OA 1
5
MON
OB 5
OB 1
OEB
DESCRIPTION
The QS5805T clock buffer/driver circuits can be used for clock buffering
schemes where low skew is a key parameter. This device offers two banks
of five non-inverting outputs. This device provides low propagation delay
buffering with on-chip skew of 0.7ns for same-transition, same-bank signals.
The QS5805T is characterized for operation at -40°C to +85°C.
FEATURES:
10 output, low skew signal buffer
Guaranteed low skew:
0.7ns output skew (same bank)
0.9ns output skew (different bank)
1ns part-to-part skew
Input hysteresis for better noise margin
Monitor output
Undershoot clamp diodes on all inputs
Std., A, and B speed grades
Available in QSOP and SOIC packages
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| QS5805ATSO | LOW SKEW CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20 |
| QS83C154XXX-1:D | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PQCC44 |
| QS29FCT521CSO | 8-BIT, DSP-PIPELINE REGISTER, PDSO24 |
| QS29FCT2520BH | 8-BIT, DSP-PIPELINE REGISTER, CDSO24 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| QS5805ATQX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Five Distributed-Output Clock Driver |
| QS5805ATSO | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Five Distributed-Output Clock Driver |
| QS5805B | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER |
| QS5805BQ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Five Distributed-Output Clock Driver |
| QS5805BSO | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Five Distributed-Output Clock Driver |
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