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參數(shù)資料
| 型號(hào)： | QS53806ASO |
| 英文描述： | Five Distributed-Output Clock Driver |
| 中文描述： | 五分布式輸出時(shí)鐘驅(qū)動(dòng)器 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大小： | 95K |
| 代理商： | QS53806ASO |
1
QS53806/A
GUARANTEED LOW SKEW 3.3V CMOS CLOCK DRIVER/BUFFER
INDUSTRIAL TEMPERATURE RANGE
JULY 2000
1999 Integrated Device Technology, Inc.
DSC-5828/-
c
QS53806/A
INDUSTRIAL TEMPERATURE RANGE
GUARANTEED LOW SKEW
3.3V CMOS CLOCK
DRIVER/BUFFER
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION
The QS53806 clock driver/buffer circuit can be used for clock buffering
schemes where low skew is a key parameter. The QS53806 offers two
banks of five inverting outputs. Designed in IDT's proprietary CMOS
process, these devices provide low propagation delay buffering with on-
chip skew of 0.6ns for same-transition, same-bank signals.
IN
A
IN
B
OE
A
OE
B
OB
5 -
OB
1
OA
5 -
OA
1
MON
5
5
FEATURES
JEDEC compatible LVTTL inputs and outputs
10 low skew clock outputs (inverting)
Monitor output
Clock inputs are 5V tolerant
Pinout and function compatible with QS5806
Input hysteresis for better noise margin
Guaranteed low skew
0.6ns output skew (same bank)
0.8ns output skew (different banks)
1.5ns part-to-part skew
Std. and A speed grades
Available in QSOP and SOIC packages
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| QS53807AQ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Ten Distributed-Output Clock Driver |
| QS53807ASO | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Ten Distributed-Output Clock Driver |
| QS53807Q | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Ten Distributed-Output Clock Driver |
| QS53807SO | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Ten Distributed-Output Clock Driver |
| QS54FCT138ATHB | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Integrated Device Technology Inc 功能描述: |
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