參數(shù)資料
型號: QS532807SO
廠商: QUALITY SEMICONDUCTOR INC
元件分類: 時鐘及定時
英文描述: GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER
中文描述: QS5 SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
封裝: 0.300 INCH, SOIC-20
文件頁數(shù): 3/6頁
文件大?。?/td> 87K
代理商: QS532807SO
3
QS532807
3.3V GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: T
A
= -40°C to +85°C, V
CC
= 3.3V ± 0.3V
Symbol
V
IH
V
IL
V
IC
V
OH
Parameter
Test Conditions
Mn.
2
–0.5
Vcc - 0.2
2.4
60
50
50
Typ.
(1)
1.7
–0.7
195
80
112
0.2
28
Max.
5.5
0.8
–1.2
0.2
0.4
0.5
±1
±1
200
200
Unit
V
V
V
V
Input HIGH Voltage
Input LOW Voltage
Clamp Diode Voltage
(3)
Output HIGH Voltage
Guaranteed Logic HIGH for All Inputs
Guaranteed Logic LOW for All Inputs
Vcc = Mn., I
IN
= -18mA
Vcc = Mn., I
OH
= -100
μ
A
Vcc = Mn., I
OH
= -8mA
Vcc = Mn., I
OL
= 100
μ
A
Vcc = Mn., I
OL
= 6mA
Vcc = Mn., I
OL
= 8mA
Vcc = Max., V
IN
= V
CC
or GND
Vcc = 0V, V
IN
= V
CC
or GND
Vcc = Max., V
OUT
= GND
Vcc = 3.3V, V
IN
= V
IH
or V
IL
, V
O
= 1.5V
Vcc = 3.3V, V
IN
= V
IH
or V
IL
, V
O
= 1.5V
V
TLH
- V
THL
for All Inputs
Vcc = Mn., I
OL
= 12mA
V
OL
Output LOW Voltage
V
I
IN
I
OFF
I
OS
I
ODH
I
ODL
V
T
R
OUT
Input Leakage Current
Input Power Off Leakage
Short Circuit Current
(2,3)
Output HIGH Current
Output LOW Current
Input Hysteresis
Output Resistance
(4)
μ
A
μ
A
mA
mA
mA
V
NOTES:
1. Typical values are at V
CC
= 3.3V, T
A
= 25°C.
2. Not more than one output should be used to test this high power condition. Duration is less than one second.
3. Guaranteed by design but not tested.
4. Output resistance represents the total output impedance of the logic device and includes added series termination resistance.
POWER SUPPLY CHARACTERISTICS
Symbol
I
CC
I
CC
Parameter
Test Conditions
Typ.
(2)
0.01
0.1
Max.
100
30
Unit
μ
A
μ
A
Quiescent Power Supply Current
Supply Current per Input HIGH
V
CC
= Max., V
IN
= GND or Vcc
V
CC
= Max., V
IN
= 3V
Input toggling at 50% duty cycle
V
CC
= Max., outputs Enabled
V
CC
= Max.,
Input at 50% duty cycle
f
I
= 10MHz
V
CC
= Max.,
Input at 50% duty cycle
f
I
= 2.5MHz
I
CCD
I
C
Dynamc Power Supply Current per Output
(1)
Total Power Supply Current Examples
(1,3)
60
6
90
10
μ
A/MHz
mA
V
IN
= GND or Vcc
V
IN
= GND or Vcc
1.5
3
NOTES:
1. Guaranteed by design but not tested. C
L
= 0pF.
2. Typical values are for reference only. Conditions are V
CC
= 3.3V, T
A
= 25°C.
3. I
C
= I
CC
+ (
I
CC
)(D
H
)(N
T
) + I
CCD
(f
O
)(N
O
)
where:
D
H
= Input Duty Cycle
N
T
= Number of TTL HIGH inputs at D
H
(one)
f
O
= Output Frequency
N
O
= Number of outputs at f
O
(ten)
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