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參數(shù)資料
| 型號： | QPP-029 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | QuikPAC Module Class AB Driver Stage |
| 中文描述： | QuikPAC模塊AB類驅(qū)動階段 |
| 文件頁數(shù)： | 2/3頁 |
| 文件大?。?/td> | 25K |
| 代理商： | QPP-029 |
Xemod QuikPAC Data
QPP-029
www.xemod.com
Rev. B (04-10-02) Page 2 of
3
Performance at 28VDC & 25oC (continued)
Parameter
IMD Variation – 100 kHz to 25 MHz tone spacing
2
nd
Harmonic at 35W P
out
(single tone)
3
rd
Harmonic at 35W P
out
(single tone)
Group (Signal) Delay
Transmission Phase Flatness
CDMA ACPR at 7W Pavg
CDMA ACPR at 3.5W Pavg
Drain Efficiency at 7W CDMA
Drain Efficiency at 3.5W CDMA
Notes:
Symbol
τ
d
η
η
Min
20
12
Nom
1.0
-40
-45
3.5
0.5
-45
-48
23
14
Max
2.0
Units
dB
dBc
dBc
ns
degrees
dB
dB
%
%
This QuikPAC module requires an externally supplied gate voltage (V
GS
) on the gate lead (pin 3) to set the operating point
(quiescent current- I
DQ
) of the power transistor. V
GS
may be safely set to any voltage in the range listed in the table. This
permits a wide range of quiescent current to be used. Since the operating characteristics of the module will vary as I
DQ
changes, the bias setting will depend on the application. The data provided in the Performance section of this data sheet
was obtained with I
DQ
set to a value within the range listed (a nominal value ±10%). This particular value was chosen to
optimize gain, IMD performance, and efficiency simultaneously.
Gate voltage must be applied coincident with or after application of the drain voltage to prevent potentially destructive
oscillations. Bias voltages should never be applied to a module unless it is terminated on both input and output.
The V
GS
corresponding to a specific I
DQ
will vary from module to module. This is due to the normal die-to-die variation in
threshold voltage of LDMOS transistors.
Since the gate bias of an LDMOS transistor changes with device temperature, it may be necessary to use a V
GS
supply
with thermal compensation if operation over a wide temperature range is required.
Internal RF decoupling is included on all bias leads. No additional bypass elements are required, however some
applications may require energy storage on the drain leads to accommodate time-varying waveforms.
The RF leads are internally protected against DC voltages up to 100V. Care should be taken to avoid video transients that
may damage the active devices.
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