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參數(shù)資料
| 型號： | QPO-1LZ-01 |
| 廠商： | Vicor Corporation |
| 文件頁數(shù)： | 16/17頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC INTERFACE FILTER |
| 標(biāo)準(zhǔn)包裝： | 20 |
| 系列： | Picor®, QUIETPOWER® |
| 其它名稱： | 1102-1095-5 |
PICOR Corporation picorpower.com
QPO-1
Rev 3.6
Page 8 of 17
QPO-1
QUIETPOWER
QPO Optional Start-up Circuits
Figure 11 - Optional Start-up circuit using SC control.
In Figure 11, an optional start-up circuit has been added to a
SC regulated design; comprised of components RSU1, RSU2,
DZ1, QSU and CSU. During start-up, this circuit is used to
connect the QPO-1’s reference pin to its input pin.
This
eliminates the delay of the output voltage reaching its proper
value due to the VREF pin internal capacitor being charged
through an internal resistor.
Figure 12 - Start-up waveforms; without (left) and with (right) the optional Startup circuit.
In the picture to the left in Figure 12 shows the start-up
voltage waveforms without the optional start-up circuit, using
the circuit design shown in Figure 9. The QPO-1’s input
voltage (the converter’s output voltage) can be seen to be
greater than the nominal 5V output of the converter. This is
due to the QPO-1’s SC circuit having greater headroom
voltage during start-up and therefore over-driving the
SC/Trim pin of the converter. After about 40ms, the VREF
voltage reaches its 5V pre-set limit and the converter’s output
voltage starts to drop, eventually steadying out at about
5.35V, the nominal output voltage plus the QPO-1’s
headroom voltage. The potential problem with this start-up
is that the converter could fault due to its output being
forced to a voltage greater than 110% of the nominal value.
For converters with lower nominal output voltages, this could
be very serious condition. The addition of extra headroom
capacitance, between VREF and GND, to increase the PARD
attenuation at lower frequencies will increase the duration of
the over-driving of the converter.
The waveforms to the right in Figure 12 are the same
converter with the optional start-up circuit enabled, shown in
Figure 11. Here, the VREF is forced to follow QPO IN, so QPO
OUT follows as well. After about 25ms, the start-up circuit
releases the VREF pin and it adjusts it value down to generate
the proper headroom voltage across the QPO-1. Using this
method, there is no possibility of over-driving the converter
and causing a fault.
Channel 1 (blue) is VIN+ from the converter, Channel 2 (light blue) is QPOOUT, and Channel 3 (violet) is the QPO-1’s VREF pin.
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