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參數(shù)資料
| 型號： | QL4036-0PB256C |
| 英文描述： | Field Programmable Gate Array (FPGA) |
| 中文描述： | 現(xiàn)場可編程門陣列（FPGA） |
| 文件頁數(shù)： | 2/12頁 |
| 文件大?。?/td> | 199K |
| 代理商： | QL4036-0PB256C |
40
Preliminary
QL4036 - QuickRAMTM
6-40
RAM Cell Synchronous Read Timing
RAM Cell Asynchronous Read Timing
Input-Only/Clock Cells
Clock Cells
Notes:
[7]The array distributed networks consist of 40 half columns and the global distributed networks consist of 44
half columns, each driven by an independent buffer. The number of half columns used does not affect
clock buffer delay. The array clock has up to 8 loads per half column. The global clock has up to 11 loads
per half column.
Symbol
Parameter
Propagation Delays (ns)
Fanout
12
34
8
TSRA
RA Setup Time to RCLK
1.0
THRA
RA Hold Time to RCLK
0.0
TSRE
RE Setup Time to RCLK
1.0
THRE
RE Hold Time to RCLK
0.0
TRCRD
RCLK to RD [5]
4.0
4.3
4.6
4.9
6.1
Symbol
Parameter
Propagation Delays (ns)
Fanout
12
3
4
8
RPDRD
RA to RD [5]
3.0
3.3
3.6
3.9
5.1
Symbol
Parameter
Propagation Delays (ns)
Fanout [5]
12348
12
24
TIN
High Drive Input Delay
1.5
1.6
1.8
1.9
2.4
2.9
4.4
TINI
High Drive Input, Inverting Delay
1.6
1.7
1.9
2.0
2.5
3.0
4.5
TISU
Input Register Set-Up Time
3.1
TIH
Input Register Hold Time
0.0
TlCLK
Input Register Clock To Q
0.7
0.8
1.0
1.1
1.6
2.1
3.6
TlRST
Input Register Reset Delay
0.6
0.7
0.9
1.0
1.5
2.0
3.5
TlESU
Input Register Clock Enable Setup Time
2.3
TlEH
Input Register Clock Enable Hold Time
0.0
Symbol
Parameter
Propagation Delays (ns)
Loads per Half Column [7]
12348
10
11
tACK
Array Clock Delay
1.2
1.3
1.5
1.6
1.7
tGCKP
Global Clock Pin Delay
0.7
tGCKB
Global Clock Buffer Delay
0.8
0.9
1.1
1.2
1.3
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| QL4036-0PB256I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA) |
| QL4036-0PF144C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA) |
| QL4036-0PF144I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA) |
| QL4036-0PG208M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:90,000 Usable PLD Gate QuickRAM Combining Performance, Density and Embedded RAM |
| QL4036-0PG208M/883 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:90,000 Usable PLD Gate QuickRAM Combining Performance, Density and Embedded RAM |
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