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QL16x24B
4-22
The QL16x24B is a member of the pASIC 1 Family of very-high-speed
CMOS user-programmable ASIC devices. The 384 logic cell field-
programmable gate array (FPGA) offers 4,000 usable ASIC gates
(equivalent to 7,000 PLD gates) of high-performance general-purpose
logic in 84-pin PLCC, 100-pin and 144-pin TQFP, 144-pin CPGA, and
160-pin CQFP.
Low-impedance,
metal-to-metal,
ViaLink
interconnect
technology
provides nonvolatile custom logic capable of operating above 150 MHz.
Logic cell delays under 2 ns, combined with input delays of under 1.5 ns
and output delays under 3 ns, permit high-density programmable devices
to be used with today’s fastest microprocessors and DSPs.
Designs can be entered using QuickLogic’s QuickWorks Toolkit or most
populart third-party CAE tools. QuickWorks combines Verilog/VHDL
design entry and simulation tools with device-specific place & route and
programming software. Ample on-chip routing channels allow fast, fully
automatic place and route of designs using up to 100% of the logic and
I/O cells, while maintaining fixed pin-outs.
Total of 122 I/O pins
– 114 Bidirectional Input/Output pins
– 6 Dedicated Input/High-Drive pins
– 2 Clock/Dedicated input pins with fanout-independent, low-skew
clock networks
Input + logic cell + output delays under 6 ns
Chip-to-chip operating frequencies up to 110 MHz
Internal state machine frequencies up to 150 MHz
Clock skew < 0.5 ns
Input hysteresis provides high noise immunity
Built-in scan path permits 100% factory testing of logic and I/O cells
and functional testing with Automatic Test Vector Generation
(ATVG) software after programming
Packages are 84-pin PLCC, 100-pin and 144-pin TQFP, 144-pin
CPGA, and 160-pin CQFP
84-pin PLCC compatible with QL12x16B
100-pin TQFP compatible with QL8x12B and QL12x16B
144-pin TQFP compatible with QL24x32B
0.65 CMOS process with ViaLink programming technology
FEATURES
PRODUCT
SUMMARY