參數(shù)資料
    型號(hào): Q67120-C769
    廠商: SIEMENS AG
    英文描述: High Speed CMOS Logic 8-Input NAND Gate 14-SOIC -55 to 125
    中文描述: 8位CMOS單芯片微控制器
    文件頁(yè)數(shù): 5/24頁(yè)
    文件大?。?/td> 980K
    代理商: Q67120-C769
    Data Sheet
    1
    V1.0, 2001-08
    C167CS-xC
    16-Bit Single-Chip Microcontroller
    C166 Family
    C167CS-xC
    High Performance 16-bit CPU with 4-Stage Pipeline
    – 80/60 ns Instruction Cycle Time at 25/33 MHz CPU Clock
    – 400/303 ns Multiplication (16
    ×
    16 bit), 800/606 ns Division (32/16 bit)
    – Enhanced Boolean Bit Manipulation Facilities
    – Additional Instructions to Support HLL and Operating Systems
    – Register-Based Design with Multiple Variable Register Banks
    – Single-Cycle Context Switching Support
    – 16 MBytes Total Linear Address Space for Code and Data
    – 1024 Bytes On-Chip Special Function Register Area
    16-Priority-Level Interrupt System with 56 Sources, Sample-Rate down to 40/30 ns
    8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via
    Peripheral Event Controller (PEC)
    Clock Generation via on-chip PLL (factors 1:1.5/2/2.5/3/4/5),
    via prescaler or via direct clock input
    On-Chip Memory Modules
    – 3 KBytes On-Chip Internal RAM (IRAM)
    – 8 KBytes On-Chip Extension RAM (XRAM)
    – 32 KBytes On-Chip Program Mask ROM
    On-Chip Peripheral Modules
    – 24-Channel 10-bit A/D Converter with Programmable Conversion Time
    down to 7.8
    μ
    s
    – Two 16-Channel Capture/Compare Units
    – 4-Channel PWM Unit
    – Two Multi-Functional General Purpose Timer Units with 5 Timers
    – Two Serial Channels (Synchronous/Asynchronous and High-Speed-Synchronous)
    – Two On-Chip CAN Interfaces (Rev. 2.0B active) with 2
    ×
    15 Message Objects
    (Full CAN/Basic CAN), can work on one bus with 30 objects
    – On-Chip Real Time Clock
    Up to 16 MBytes External Address Space for Code and Data
    – Programmable External Bus Characteristics for Different Address Ranges
    – Multiplexed or Demultiplexed External Address/Data Buses with 8-Bit or 16-Bit
    Data Bus Width
    – Five Programmable Chip-Select Signals
    – Hold- and Hold-Acknowledge Bus Arbitration Support
    Idle, Sleep, and Power Down Modes with Flexible Power Management
    Programmable Watchdog Timer and Oscillator Watchdog
    Up to 111 General Purpose I/O Lines,
    partly with Selectable Input Thresholds and Hysteresis
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