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參數(shù)資料
| 型號： | PXB4220 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | members of Infineon ATM Chipset |
| 中文描述： | 自動柜員機成員英飛凌芯片組 |
| 文件頁數(shù)： | 1/2頁 |
| 文件大?。?/td> | 46K |
| 代理商： | PXB4220 |
(IMA) interface
I
8 generic framer interfaces with
integrated transmit clock selec-
tor supporting
- Synchronous Mode (SYM)
- Generic Interface Mode (GIM)
- FALC Mode (FAM): Glue-less
interface for Infineon's Framer
and Line Interface Compo-
nents (FALC)
- Echo Canceller Mode (EC):
ATM cells are duplicated
internally and transmitted via
two framer ports
I
UTOPIA industry standard
interface:
- Level 2 in slave mode; 8 data,
5 address lines
- Level 1 in master/slave mode
- UTOPIAclockupto38.88MHz
P
R O D U C T
B
R I E F
N e v e r s t o p t h i n k i n g .
I W E 8
P X B 4 2 2 0 / 4 2 2 1
Features
I
Full duplex ATM Packetizer/
Depacketizer for 8 E1/T1
highways
I
Configurable to T1 or E1 mode
via external pin
I
8T1/E1portsconfigurable inde-
pendently to ATM or AAL Mode
I
ATM Mode:
- ATM cell mapping into PDH
according to ITU-T G.804
- B-ISDN User-Network
Interface
- Physical Layer Opera-
tion at 1544 kbit/s and
2048 kbit/s according to
ITU-T I.432.3
I
AAL Mode (PXB 4220/4221):
- AAL1 according to
ITU-T I.363.1 or transparent
without any adaptation layer
overhead (AAL0)
- Structured T1/E1 N x 64 kbit/s
service
- Channel Associated Signalling
(CAS)
- Partially filled cells with pro-
grammable filling thresholds
- Reassembly buffer can com-
pensate up to +/- 4 ms Cell
Delay Variation (CDV)
- Statistics counters per chan-
nel for lost/misinserted/errored
cells etc.
- Internal clock recovery circuit
using Synchronous Residual
Time Stamp (SRTS) or Adap-
tive Clock Method (ACM) for
unstructured CES ports.
Optionally, it's possible to
order the PXB 4221 device,
which comes without SRTS
clock recovery.
I
Inverse Multiplexing over ATM
The "Interworking Element for 8 E1/T1 lines"
(IWE8), PXB 4220 and PXB 4221 are members of
Infineon" ATM Chipset. Together with framing and
line interface components (e.g. Infineon's
QuadFALC PEB 22554) the IWE8 serves as gate-
way between Asynchronous Transfer Mode (ATM)
networks and timeslot based PDH networks.
The IWE8 is a single chip multiservice device that
integrates ATM cell handling and TDM circuit to
ATM cell interworking in E1/T1 applications. Each
of the 8 E1 or T1 input and output ports can be
configured independently to operate in ATM Mode
or AAL Mode. It is a very flexible solution support-
ing multiple services with a minimum of devices.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PXB4220E | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Interworking Element for 8 E1/T1 Lines |
| PXB4220EV3.3 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| PXB4220EV3.4 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Infineon Technologies AG 功能描述: |
| PXB4220EV3.4-G | 功能描述:接口—CODEC ATM/IP INTERWRKNG RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| PXB4220E-V32 | 功能描述:IC CHIPSET 8 E1/T1 LINE 256-BGA RoHS:否 類別:集成電路 (IC) >> 接口 - 專用 系列:* 特色產(chǎn)品:NXP - I2C Interface 標(biāo)準(zhǔn)包裝:1 系列:- 應(yīng)用:2 通道 I²C 多路復(fù)用器 接口:I²C，SM 總線 電源電壓:2.3 V ~ 5.5 V 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:剪切帶 (CT) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:825 (CN2011-ZH PDF) 其它名稱:568-1854-1 |
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