參數(shù)資料
型號: PXAG37KFBD
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: XA 16-bit microcontroller family 32K/512 OTP/ROM/ROMless, watchdog, 2 UARTs
中文描述: 16-BIT, OTPROM, 30 MHz, MICROCONTROLLER, PQFP44
封裝: 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT389-1, LQFP-44
文件頁數(shù): 22/36頁
文件大小: 208K
代理商: PXAG37KFBD
Philips Semiconductors
Product specification
XA-G3
XA 16-bit microcontroller family
32K/512 OTP/ROM/ROMless, watchdog, 2 UARTs
1999 Apr 07
22
ABSOLUTE MAXIMUM RATINGS
PARAMETER
RATING
UNIT
°
C
°
C
V
Operating temperature under bias
–55 to +125
Storage temperature range
–65 to +150
Voltage on EA/V
PP
pin to V
SS
Voltage on any other pin to V
SS
Maximum I
OL
per I/O pin
Power dissipation (based on package heat transfer limitations, not device power consumption)
0 to +13.0
–0.5 to V
DD
+0.5V
15
V
mA
1.5
W
DC ELECTRICAL CHARACTERISTICS
V
DD
= 2.7V to 5.5V unless otherwise specified; V
DD
= T
amb
= 0 to +70
°
C for commercial, –40
°
C to +85
°
C for industrial, unless otherwise specified.
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
TYP
UNIT
MIN
MAX
Supplies
I
DD
I
ID
I
PD
I
PDI
V
RAM
V
IL
Supply current operating
30 MHz
60
80
mA
Idle mode supply current
30 MHz
22
30
mA
Power-down current
Power-down current (–40
°
C to +85
°
C)
RAM-keep-alive voltage
5
100
A
150
A
RAM-keep-alive voltage
1.5
V
Input low voltage
–0.5
0.22V
DD
V
V
IH
Input high voltage except XTAL1 RST
Input high voltage, except XTAL1, RST
At 5.0V
2.2
V
At 3.3V
2
V
V
IH1
Input high voltage to XTAL1, RST
For both 3.0 & 5.0V
0.7V
DD
V
V
OL
Output low voltage all ports ALE PSEN
Output low voltage all ports, ALE, PSEN
3
I
OL
= 3.2mA, V
DD
= 5.0V
1.0mA, V
DD
= 3.0V
I
OH
= –100 A, V
DD
= 4.5V
I
OH
= –15 A, V
DD
= 2.7V
I
OH
= 3.2mA, V
DD
= 4.5V
I
OH
= 1mA, V
DD
= 2.7V
0.5
V
0.4
V
V
OH1
Output high voltage all ports ALE PSEN
Output high voltage all ports, ALE, PSEN
1
2.4
V
2.0
V
V
OH2
Output high voltage ports P0 3 ALE PSEN
Output high voltage, ports P0–3, ALE, PSEN
2
2.4
V
2.2
V
C
IO
I
IL
I
LI
I
TL
Input/Output pin capacitance
Logical 0 input current, P0–3
6
Input leakage current, P0–3
5
Logical 1 to 0 transition current all ports
4
15
pF
V
IN
= 0.45V
V
IN
= V
IL
or V
IH
At 5.5V
–25
–75
±
10
–650
A
A
A
NOTES:
1. Ports in Quasi bi-directional mode with weak pull-up (applies to ALE, PSEN only during RESET).
2. Ports in Push-Pull mode, both pull-up and pull-down assumed to be same strength
3. In all output modes
4. Port pins source a transition current when used in quasi-bidirectional mode and externally driven from 1 to 0. This current is highest when
V
IN
is approximately 2V.
5. Measured with port in high impedance output mode.
6. Measured with port in quasi-bidirectional output mode.
7. Load capacitance for all outputs=80pF.
8. Under steady state (non-transient) conditions, I
OL
must be externally limited as follows:
Maximum I
OL
per port pin:
15mA (*NOTE: This is 85
°
C specification for V
DD
= 5V.)
Maximum I
OL
per 8-bit port:
26mA
Maximum total I
OL
for all output: 71mA
If I
OL
exceeds the test condition, V
OL
may exceed the related specification. Pins are not guaranteed to sink current greater than the listed
test conditions.
9. See Figures 25, 26, 29, and 30 for I
DD
test conditions, and Figures 27 and 28 for I
CC
vs. Frequency.
Max. 5V Active I
DD
= (fosc * 1.77 mA) + 7 mA
Max. 5V Idle I
Max. 3V Active I
DD
= (fosc * 0.77 mA) + 7 mA
Max. 3V Idle I
DD
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