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參數(shù)資料
| 型號： | PWR-82521-140 |
| 廠商： | DATA DEVICE CORP |
| 元件分類： | 運動控制電子 |
| 英文描述： | BRUSHLESS DC MOTOR CONTROLLER, 18 A, DMA41 |
| 封裝： | DIP-41 |
| 文件頁數(shù)： | 11/12頁 |
| 文件大?。?/td> | 150K |
| 代理商： | PWR-82521-140 |
OUTPUT CURRENT
Output current derating as a function of the hybrid case temper-
ature is provided in FIGURE 10. The hybrid contains internal
pulse by pulse current limit circuitry to limit the output current dur-
ing fault conditions.(See TABLE 2) Current Limit accuracy is
+10/-15%.
THERMAL OPERATION
It is recommended the PWR-82520 be mounted to a heat sink.
This heat sink shall have the capacity to dissipate heat generat-
ed by the hybrid at all levels of current output, up to the peak
limit, while maintaining the case temperature limit as per FIG-
URE 10.
8
June 1, 2000; Data Device Corp.
CURRENT MONITOR OUT (Pin 35)
This is a bipolar analog output voltage representative of motor
current. The Current Monitor Output will have the same scaling
as the Current Command input, 1.0 V/A. The output resistance
will be less than 100
.
BRUSH MOTOR OPERATION
The PWR-82521 can also be used as a brush motor controller
for current or voltage control in an H-Bridge configuration. The
PWR-82521 would be connected as shown in FIGURE 8. All
other connections are as shown in either FIGURE 12 or 13
depending on current or voltage mode operation. The Hall inputs
are wired per TABLE 4. A positive input command will result in
positive current to the motor out of Phase A.
TABLE 4. HALL INPUTS FOR H-BRIDGE CONTROLLER
H
L
ENABLE
—
Negative
Positive
COMMAND
IN
1
HA
1
HB
0
HC
INPUT
Z
L
H
PH A
OUTPUT
Z
PH B
Z
H
L
PH C
PHASE A
PHASE C
VBUS-
PHASE B
VBUS+
PHASE C
HALL C
HALL B
HALL A
+15V HALL SUPPLY OUT
HALL SUPPLY GND
6
5
4
16
15
14
9
8
7
3
2
1
13
12
11
39
38
37
41
40
GND
+28V
+5V
FIGURE 8. BRUSH MOTOR HOOK UP
WARNING: The PWR-82521 does not have short circuit pro-
tection. the PWR-82521 must see a minimum of 100uH induc-
tive load or enought line-to-line resistance to limit the output
current to <10A at all times. Operation into a short or a condi-
tion that requires excessive output current will damage the
hybrid.
TABLE 3. COMMUTATION TRUTH TABLE
INPUTS
OUTPUTS
ENABLE
DIR **
HA
HB
HC
PHASE A PHASE B PHASE C
L
CW
1
0
H
L
Z
L
CW
1
0
H
Z
L
CW
0
1
0
Z
H
L
CW
0
1
L
H
Z
L
CW
0
1
L
Z
H
L
CW
1
0
1
Z
L
H
L
CCW
1
0
1
Z
H
L
CCW
0
1
H
Z
L
CCW
0
1
H
L
Z
L
CCW
0
1
0
Z
L
H
L
CCW
1
0
L
Z
H
L
CCW
1
0
L
H
Z
H
—
Z
1=Logic Voltage >3.5 VDC, 0=Logic voltage < 0.7 VDC
** DIR is based on the convention shown in Figure 4. Actual
motor set up might be different.
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