
8
December 6, 1999 Data Device Corporation
P
PR
RE
EL
LIIM
MIIN
NA
AR
RY
Y
PHASE A, B, C
These are the power drive outputs to the motor and switch
between VBUS+ Input and VBUS- Input or become high imped-
ance - see TABLE 3
SYNC IN
The sync pulse, as shown in FIGURE 7, can be used to syn-
chronize the switching frequency up to 20% faster than the free
running frequency of all the slave devices.
VDR (+15V Supply)
This input is used to power the gate driver circuitry for the output
MOSFETs. There is no power consumption from VDR when the
hybrid is disabled.
VCC (+5V Supply) and VCC RTN
These inputs are used to power the digital circuitry of the hybrid.
VDD (+5V to +15V Supply),
VEE (-5V to -15V Supply)
These inputs can vary from ±5V to ±15V as long as they are
symmetrical. VDD and VEE are used to power the small signal
analog circuitry of the hybrid. Please note that using ±5V supply
will reduce by approximately 60% of the quiescent power con-
sumption when compared to ±15V operation.
PWM FREQUENCY
The PWM frequency from the PWM OUT pin will free-run at a
frequency of 100KHz ± 5KHz. The PWM frequency is user
adjustable from 100KHz down to 10KHz through the addition of
an external capacitor. The PWM triangle wave generated inter-
nally is brought out to the PWM OUT pin. This output, or an
external triangle waveform generated by the user, may be con-
nected to PWM IN on the hybrid.
PWM OUT
This is the output of the internally generated PWM triangle wave-
form. It is normally connected to PWM IN. The frequency of this
output may be lowered by connecting an NPO capacitor (Cext)
between PWM OUT and PWM GND. The PWM frequency is
determined by the following formula:
16.5E-6
330pF + CEXTpF
TABLE 3. COMMUTATION TRUTH TABLE
INPUTS
OUTPUTS
ENABLE DIR** HA HB HC
PHASE
B
PHASE
C
PHASE
A
L
CW
1
0
L
Z
H
L
CW
1
0
Z
L
H
L
CW
0
1
0
H
L
Z
L
CW
0
1
H
Z
L
CW
0
1
Z
H
L
CW
1
0
1
L
H
Z
L
CCW
1
0
1
H
L
Z
L
CCW
0
1
Z
L
H
L
CCW
0
1
L
Z
H
L
CCW
0
1
0
L
H
Z
L
CCW
1
0
Z
H
L
CCW
1
0
H
Z
L
H
-
Z
1=Logic Voltage >2.4Vdc, 0=Logic voltage < 0.8Vdc
** DIR is based on the convention shown in FIGURE 4.
Actual motor set up might be different.
OUTPUT CURRENT
Output current derating as a function of the hybrid case temper-
ature is provided in FIGURE 9.The hybrid contains internal pulse
by pulse current limit circuitry to limit the output current during
fault conditions. (See TABLE 2) Current Limit accuracy is +10/-
15%.
TACH OUT
The TACH OUT provides a tachometer signal relative to motor
speed which is derived from the three Hall inputs HA, HB, HC.
The tach circuitry combines these three signals into a single
pulse train as a 50%-duty-cycle pulse. There are three pulses
that occur every 360 electrical degree. The number of pulses per
motor revolution is formulated below:
Pr = P x 3 (e.g. 6 pulses/revolution for a 4 pole motor)
2
The motor RPM is:
RPM = 60
T x Pr
where,
P = number of motor pole
Pr = number of pulses per revolution
T = Pulse Period in second
SYNC PERIOD
0V
5V
50% DUTY CYCLE
FIGURE 7. SYNC INPUT SIGNAL
WARNING: Never apply power to the hybrid without connect-
ing either PWM OUT or an external triangular wave to PWM IN!
Failure to do so may result in one or more outputs latching on.
WARNING! The PWR-82520X does not have short circuit pro
tection.The PWR-82520X must see a minimum of 100H induc-
tive load or enough line-to-line resistance to limit the output cur-
rent to less than rated current at all times. Operation into a short
or a condition that requires excessive output current will damage
the hybrid.