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參數(shù)資料
| 型號： | PWR-82520R3-100 |
| 廠商： | DATA DEVICE CORP |
| 元件分類： | 運(yùn)動控制電子 |
| 英文描述： | BRUSHLESS DC MOTOR CONTROLLER, 8 A, PDMA41 |
| 封裝： | HYBRID, DIP-41 |
| 文件頁數(shù)： | 16/20頁 |
| 文件大?。?/td> | 187K |
| 代理商： | PWR-82520R3-100 |
5
Data Device Corporation
www.ddc-web.com
PWR-82520R
PWM IN
+ Peak
- Peak
Frequency
Linearity Error
Duty Cycle
VP+
VP-
f
LIN
D CYCLE
Vcc = 4.5 - 5.5V
2.3
-2.7
10
-2
49
2.5
-2.5
50
2.7
-2.3
110
+2
51
V
KHz
%
PWM OUT
Free Run Frequency
R10
R1, R3
Accuracy
Stability, Temperature
fPWM
Full Temp Range
47.5
95
50
100
±10
0.5
52.5
105
2.0
KHz
%
HALL SIGNALS
Logic 0
Logic 1
HA, HB, HC
2.4
0.8
Vdc
TABLE 2. PWR-82520R SPECIFICATIONS (CONTINUED)
(UNLESS OTHERWISE SPECIFIED,VBUS=28VDC,VDR=+15V,VCC = +5V,VDD=+5V,VEE=-5V,TC = 25°C, LL = 500 H, 100KRAD)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
CURRENT COMMAND
Transconductance Ratio
PWR-82520R1
PWR-82520R3
PWR-82520R10
Non-Linearity
Temperature Coefficient of G
G
FIGURE 7
0.24
0.73
2.40
-1.5
0.25
0.75
2.50
0.035
0.26
0.77
2.60
+1.5
A/V
% FSR
% FSR/°C
VBUS+ SUPPLY
Nominal Operating Voltage
Vnom
18
28
70
Vdc
SYNC
Low
High
Duty Cycle
SYNC range as % of free-run frequency
SYNC IN
2.4
100
50
0.8
120
Vdc
%
+15V SUPPLY
Voltage
Current
R1
R3
R10
ENABLE = high
ENABLE = low
VDR
IDR
+13.5
+15.0
100
8
18
40
+16.5
15
25
60
Vdc
mA
+5V SUPPLY
Voltage
Current
VCC
ICC
+4.5
+5.0
40
+5.5
60
Vdc
mA
+5V TO +15V SUPPLY
Voltage
Current
VDD
IDD
+4.5
35
+16.5
50
Vdc
mA
-5V TO -15V SUPPLY
Voltage
Current
VEE
IEE
-16.5
40
-4.5
50
Vdc
mA
ISOLATION
Case to Ground
500 Vdc HIPOT
10
M
TACH OUT/ DIR OUT
Current Sink
VOL
Open Collector
@ 1mA
0.7
1.2
Vdc
V
V/°C
+4
800
2
-4
VCMD
COMMAND IN+/-
Differential Input
Input Offset
Input Offset Drift
Vdc
V/s
s to 0.1%
+5
3
1.4
-5
VCLAMP
VO = 0.2 - 4.5V
COMMAND OUT
Internal Voltage Clamp
Slew Rate
Settling Time
ENABLE
ENABLE
Enabled
Disabled
2.4
0.8
Vdc
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