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  • 參數(shù)資料
    型號: PWR-82330-200Q
    廠商: DATA DEVICE CORP
    元件分類: 運動控制電子
    英文描述: BRUSHLESS DC MOTOR CONTROLLER, 10 A, DIP50
    封裝: 2.6 X 1.4 INCH, 0.25 INCH HEIGHT, DIP-50
    文件頁數(shù): 9/12頁
    文件大小: 152K
    代理商: PWR-82330-200Q
    6
    +VCC
    VCC B
    VCC A
    INPUT COMMANDS
    8
    32
    48
    +CAP
    VUA
    VLA
    VUB
    VLB
    VUC
    VLC
    VSd
    -CAP
    V+
    VOA
    VOB
    VOC
    GND
    VLPI
    50
    CC
    39
    46
    4
    + 15V
    MOTOR
    43,44,45
    36,37,38
    6
    PWR-82330
    10
    14
    16
    21
    COMMUTATION
    LOGIC
    23
    29,30,31
    5,18,19
    26 27 28 33 34 35 40 41
    42
    VSS C
    VSS B
    VSS A
    12
    CURRENT
    SENSE
    CIRCUITRY
    RSENSE
    FIGURE 6. FUNCTIONAL SHUT-DOWN INPUT USED WITH CURRENT-SENSING CIRCUITRY
    3. Intrinsic Diode Losses (Pd)
    Pd= Id (avg) x Vd (avg)
    Id(avg) = [(IOB + IOA) / 2] / 2 = [(7 A + 3 A) / 2] / 2 = 2.5 A
    Pd = 2.5 A x 1.25 V
    Pd = 3.125 Watts
    TRANSISTOR POWER DISSIPATION ( PQ)
    To calculate the maximum power dissipation of the output tran-
    sistor as a function of the case temperature use the following
    equation. (Reference FIGURE 8 to ensure you don’t exceed the
    maximum allowable power dissipation of each transistor.
    PQ = Pc + Ps + Pd
    TOTAL HYBRID POWER DISSIPATION (PTOTAL)
    To calculate Total Power dissipated in the hybrid use:
    6
    P
    TOTAL= ∑ [ PQi ] where i = each transistor
    i=1
    LAYOUT AND EXTERNAL COMPONENTS
    Important Information - The following layout guidelines and
    required external components are critical to the proper
    operation of these motor drives.
    Permanent damage will result to the motor drive if the user
    does not make the following recommended ground connec-
    tions that will ensure the proper operation of the hybrid.
    The V+ and logic grounds are on pins 5,18, and 19 (GND). The
    Vss connections for the output stage are on pins 26-28, 33-35
    and 40-42 (VSS). To prevent damage to the internal drive cir-
    cuitry, the differential voltage between GND and VSS must
    not exceed ± 3 V max, dc or peak. This includes the combined
    voltage drop of the associated ground paths and the voltage
    drop across Rsense (see FIGURE 9). For example, a value for
    Rsense of 0.1
    Ω will give a voltage drop of 1.00 V at 10 A and
    allow enough margin for the voltage drop in the ground conduc-
    tors. Locate Rsense 1" - 2" maximum from the hybrid. It is crit-
    ical that all ground connections be as short, and of lowest
    impedance, as the system allows.
    C1, C2, and C3 are 0.1
    μF ceramic bypass capacitors that sup-
    ply high frequency spiking. The voltage rating should be 2x the
    maximum system voltage. These capacitors should be located as
    close to the hybrid as possible. Please note, on FIGURE 9, that
    C1, C2, and C3 must go directly from terminal-to-terminal on the
    hybrid - do not daisy chain along the power ground return.
    C4 and C5 are 0.01
    μF, 50 V ceramic capacitors for power sup-
    ply decoupling. Locate as close to the hybrid as possible. CC is
    a 1
    μF, 20% capacitor (either polarized or nonpolarized). If a
    polarized cap is used, the positive terminal must be connected
    to pin 48 of the hybrid. Voltage rating should be 2x the maximum
    system voltage.
    Care must be taken to control the regenerative energy produced
    by the motor in order to prevent excessive voltage spiking on the
    VCC line. Accomplish this by placing a capacitor or clamping
    diode between VCC and high power ground return.
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