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參數(shù)資料
| 型號： | PWL6030B1AFCMRR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA187 |
| 封裝： | 7 X 7 MM, 0.40 MM PITCH, GREEN, FCBGA-187 |
| 文件頁數(shù)： | 27/97頁 |
| 文件大?。?/td> | 937K |
| 代理商： | PWL6030B1AFCMRR |
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SWCS045B
– SEPTEMBER 2010 – REVISED JUNE 2011
NOTE
The 32-kHz second primary counter is not reset when the RTC restarts with the
STOP_RTC bit. Therefore, a maximum inaccuracy of 1s is stored in the RTC, depending
on the instant the second primary counter is stopped.
Example: Time is 10H54M36S PM (AM/PM mode set), 2008 September 5. Previous registers values are:
Table 3. Real-Time Clock Registers Example
REGISTER
VALUE
SECONDS_REG
0x36
MINUTES_REG
0x54
HOURS_REG
0x10
DAYS_REG
0x05
MONTHS_REG
0x09
YEARS_REG
0x08
Rounding
The user can round to the closest minute, by setting the ROUND_30S bit of the RTC_CTRL_REG register. TC
values are set to the closest minute value at the next second. ROUND_30S bit will be automatically cleared
when the rounding time is performed (See calendar registers, such as SECONDS_REG, MINUTES_REG, etc.,
and RTC_CTRL_REG).
Example:
If the current time is 10H59M45S, rounding changes the time to 11H00M00S.
If the current time is 10H59M29S, rounding changes the time to 10H59M00S.
Get Time
The GET_TIME feature loads the RTC counter in shadow registers and makes the content of the shadow
registers available and stable for reading. Shadowed registers, linked to the GET_TIME feature, are a parallel set
of calendar static registers, at the same I2C addresses as the calendar dynamic registers. The GET_TIME bit is a
self-clearing bit. Once the copy to shadow registers is executed, it is reset to 0. If the time is read without
GET_TIME, the read value comes directly from the RTC counter and software must manage the counter change
during the reading. Time reading remains always at the same address, with or without using the GET_TIME
feature.
Compensation Registers
The RTC_COMP_MSB_REG and RTC_COMP_LSB_REG registers must respect the available access period.
These registers must be updated before each compensation process. For example, software can load the
compensation value into these registers after each hour event, during an available access period.
Figure 4 shows compensation scheduling for the RTC.
Copyright
2010–2011, Texas Instruments Incorporated
33
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