參數(shù)資料
型號(hào): PWL6030B1A0CMR
廠商: TEXAS INSTRUMENTS INC
元件分類(lèi): 電源管理
英文描述: 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA187
封裝: 7 X 7 MM, 0.40 MM PITCH, GREEN, FCBGA-187
文件頁(yè)數(shù): 51/97頁(yè)
文件大?。?/td> 937K
代理商: PWL6030B1A0CMR
SWCS045-006
Backup
battery
Main
battery
Shunt
register
VEXT
VBAT
Source
select
UPR
DIG SUPPLY
VBRTC
Digital power-
management
controller
VBATMIN_HI
VRTC
VBACKUP
VSHUNT_MIN
VBATMIN_LO
VPOR
VBATMIN_HI
VAC
VBUS
VBATMIN_LO
BG
VREF
POR
SWCS045B
– SEPTEMBER 2010 – REVISED JUNE 2011
and the voltage regulator VBRTC provide a supply for the digital control, the 32-kHz oscillators and the
low-power band gap. When the main battery voltage rises above the VBATMIN_LO threshold, the digital control
enables the checks of the startup events. When a startup event is detected, a final check of the battery voltage is
done versus the VBATMIN_HI threshold to pursue the power-up sequence. When the system is active, the
comparator is available to perform checks on battery voltage. It then compares battery voltage versus a
programmable value and generates interrupts when voltage rises above and drops below the programmed
threshold. The comparator can be programmed from 2.3 to 4.6 V level in 50-mV steps. Hysteresis is
implemented between the rising and falling edges, varying from 100 mV (VBAT = 2.3 V) to 600 mV (VBAT = 4.6
V).
NOTE
UPR = VBAT if: (VBAT
> VBATMIN_LO) + (VBAT > VBACKUP) . (VCHARGER <
VCHARGERmin)
UPR = VBACKUP if: {[(VBAT
< VBATMIN_LO) . (VBAT < VBACKUP - 0.1V)] . (VCHARGER <
VCHARGERmin)} . PORZ
UPR = VCHARGER if: (VBAT
< VBATMIN_LO) . (VCHARGER > VCHARGERmin)
Figure 8 shows a block diagram of the analog power control.
Figure 8. Block Diagram of the Analog Power Control
The boot sequence is shown in Figure 9. This monitoring validates the current state and the transitions between
the states.
Copyright
2010–2011, Texas Instruments Incorporated
55
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