
12
Data Device Corporation
www.ddc-web.com
PW-8X010P6/8X030P6/8X075P6
J-11/06-0
cally connected in series with the OUTPUT, VBUS+ or VBUS-, to
measure motor drive current.
VIRSENSE_ABS (OUTPUT)
VIRSENSE_ABS output voltage is the absolute value of the
VIRSENSE voltage signal. VIRSENSE_ABS is zero volts when there
is no current flowing through the RSENSE resistor. It will increase
towards the value of VIREF as the current in RSENSE approaches
either ± full-scale current (measurement limits of VIRSENSE).
VIRSENSE_ABS is an open source output and is "wire-OR-able".
When two or more VIRSENSE_ABS outputs are "wire-OR-ed", the
highest voltage will appear on the common signal. A typical use
for combining these outputs is for determining when an overload
condition has occurred. The VIRSENSE_ABS voltage is scaled by
the input voltage VIRSENSE where:
VIRSENSE_ABS = 2 x
|VIRSENSE- VREF/2|
OC FAULT OUTPUT
OC FAULT is an active low open drain output that goes active
when the current flowing through RSENSE has exceeded the
OC FAULT trip level. This signal is not latched like SC FAULT,
and goes inactive as soon as the over current condition stops.
PW-85010P5, PW-85030P6 AND PW-85075P6
I/O AND OPERATION
PW-85010P6, PW-85030P6 and PW-85075P6 modules can be
added to a motor drive to provide overvoltage protection capa-
10
100
1000
350
375
400
425
450
475
500
525
550
TRIP VOLTAGE, (Vdc)
RESIST
ANCE,
(K
Ohms)
OV Switch ON
OV Switch OFF
V
HYST
Vtrip
1
10
100
1000
10000
0
50
100
150
200
250
300
350
400
TRIP VOLTAGE, (Vdc)
RESIST
ANCE,
(K
Ohms)
OV Switch ON
OV Switch OFF
V
HYST
Vtrip
FIGURE 5A. EXTERNAL OV ADJUST RESISTOR
CONNECTED TO OV_ADJ_HIGH
FIGURE 5B. EXTERNAL OV ADJUST RESISTOR
CONNECTED TO OV_ADJ_LOW
bility. The following section describes the PW-85010P6, PW-
85030P6 and PW-85075P6 modules and its features.
REGEN_STATUS (OUTPUT)
The REGEN_STATUS pin is referenced to VBUS-, and indicates the
state of the regen clamp switch (H = on, L = off). An external opto-
isolator input can be connected between REGEN_STATUS and
VBUS- to translate this status to logic circuits if desired. The
REGEN_STATUS output is connected to the overvoltage amp
through a 5k
Ω resistor. When the regen clamp switch is active
(inactive), the overvoltage amp sources +15V (0V) through the 5K
Ω
resistor. (see FIGURE 1C).
REGEN_CLAMP (OUTPUT)
(REF. R20 ON FIGURES 11 AND 12)
An
external
load
dump
resistor
is
connected
between
REGEN_CLAMP and VBUS+. When VBUS+ reaches the overvolt-
age trip level set by the OV_ADJ, the internal clamp circuit will apply
the load dump resistor from VBUS+ to the V-, thereby dissipat-
ing the regenerative energy of the bus into the external resistor.
OV_ADJ (INPUT)
The PW-85010P6, PW-85030P6 and PW-85075P6 modules are
internally set for a trip voltage of 400V. The trip point can be
adjusted to a higher or lower voltage by connecting an external
overvoltage adjust resistor ROV_ADJ (Ref. R21 on FIGURES 11
and 12).
To set the overvoltage trip point to a voltage above 400 volts con-
nect ROV_ADJ between the OV_ADJ and OV_ADJ_HIGH pins. To
set the OV trip point to a voltage below 400 volts connect
PW-8X075P6, PW-8X030P6 AND PW-8X010P6 TYPICAL OVERVOLTAGE TRIP VS. OV ADJUST SETTINGS