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| 型號(hào)： | PTH12050WAH |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 電源模塊 |
| 英文描述： | 1-OUTPUT DC-DC REG PWR SUPPLY MODULE |
| 封裝： | DIP-6 |
| 文件頁(yè)數(shù)： | 21/26頁(yè) |
| 文件大?。?/td> | 1233K |
| 代理商： | PTH12050WAH |
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ELECTRICAL CHARACTERISTICS
SLTS214H – MAY 2003 – REVISED OCTOBER 2007
TA = 25°C; VI = 12 V; VO = 1.8 V; C1 = 100 F, C2 = 10 F, C3 = 0 F, and IO = IO(max) (unless otherwise stated)
PARAMETER
TEST CONDITIONS
PTH12050L
UNIT
MIN
TYP
MAX
85
°C, 400 LFM airflow
0
6
(1)
A
IO
Output current
Over
ΔVadj range
60
°C, natural convection
6
(1)
A
VI
Input voltage range
Over IO range
10.8
13.2
V
VOtol
Set-point voltage tolerance
±2
(2)
%Vo
ΔRegtemp
Temperature variation
–40
°C <T
A < 85°C
±0.5
%Vo
ΔRegline
Line regulation
Over VI range
±5
mV
ΔRegload
Load regulation
Over IO range
±5
mV
ΔRegtot
Total output variation
Includes set-point, line, load, –40
°C ≤ T
A ≤ 85°C
±3
(2)
%Vo
ΔRegadj
Output voltage adjust range
Over VI range
0.8
1.8
V
RSET = 130 , VO = 1.8 V
88%
RSET = 3.57 k, VO = 1.5 V
87%
η
Efficiency
IO = 5 A
RSET = 12.1 k, VO = 1.2 V
85%
RSET = 32.4 k, VO = 1 V
83%
RSET = open circuit, VO = 0.8 V
81%
VO > 1 V
30
Vr
Vo ripple (peak-to-peak)
20-MHz bandwidth
mVpp
VO ≤ 1 V
20
Iotrip
Overcurrent threshold
Reset, followed by auto-recovery
14
A
ttr
1 A/s load step,
Recovery time
70
s
Transient response
50 to 100% IO(max),
ΔVtr
VO over/undershoot
100
mV
C3 = 100 F
IIL track
Track input current (pin 2)
Pin to GND
–0.13
(3)
mA
dVtrack/dt
Track slew rate capability
CO ≤ CO(max)
1
V/ms
VI increasing
9.5
10.4
UVLO
Undervoltage lockout
V
VI decreasing
8.8
9
VIH
Input high voltage, Referenced to GND
Open
(3)
V
VIL
Inhibit control (pin 4)
Input low voltage, Referenced to GND
–0.2
0.5
IIL
Input low current, Pin 4 to GND
0.24
mA
II
Input standby current
Inhibit (pin 4) to GND, Track (pin 2) open
10
mA
f s
Switching frequency
Over VI and IO ranges
200
250
300
kHz
External input capacitance, C1
100
(4)
F
Nonceramic
0
100
(5)
3300
(6)
Capacitance value
F
External output capacitance, C3
Ceramic
0
300
Equivalent series resistance (nonceramic)
4
(7)
5.9
MTBF
Reliability
Per Bellcore TR-332 50% stress, TA = 40°C, ground benign
10
6 Hr
(1)
See the Temperature Derating (SOA) curves in the Typical Characteristics section for appropriate derating.
(2)
The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a
tolerance of 1% with 100 ppm/
°C or better temperature stability.
(3)
This control pin has an internal pull-up to the input voltage VI (7.5 V for pin 2). If it is left open-circuit, the module operates when input
power is applied. A small, low-leakage (<100 nA) MOSFET or open-drain/collector voltage supervisor IC is recommended for control. Do
not place an external pull-up on this pin. For further information, see the related application note.
(4)
A 100 F electrolytic input capacitor is required for proper operation. The electrolytic capacitor must be rated for a minimum of 750 mA
rms of ripple current. An additional 10 F ceramic capacitor is required for output voltages 3.3 V and higher. For further information, see
the related application information on capacitor selection.
(5)
An external output capacitor is not required for basic operation. Adding 100 F of distributed capacitance at the load improves the
transient response.
(6)
This is the calculated maximum. The minimum ESR limitation oftens result in a lower value. When controlling the Track pin using a
voltage supervisor, CO(max) is reduced to 2200 μF. See the application notes for further guidance.
(7)
This is the typical ESR for all the electrolytic (nonceramic) output capacitance. Use 7 m
as the minimum when using max-ESR values
to calculate.
4
Copyright 2003–2007, Texas Instruments Incorporated
Product Folder Link(s): PTH12050W/L
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