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ELECTRICAL CHARACTERISTICS
SLTS277B – DECEMBER 2006 – REVISED SEPTEMBER 2007
PTH08T240F
TA = 25°C, VI = 5 V, VO = 1.0 V, CI = 220 F, CO = 1000 F, and IO = IO max (unless otherwise stated)
PARAMETER
TEST CONDITIONS
PTH08T240F
UNIT
MIN
TYP
MAX
IO
Output current
Over VO range
25
°C, natural convection
0
10
A
0.69V
≤ VO < 1.3V
4.5
14 (1)
VI
Input voltage range
Over IO range
V
1.3V
≤ VO ≤ 2.0
4.5
14
VOADJ
Output voltage adjust range
Over IO range
0.69
2.0
V
Set-point voltage tolerance
±0.5
±1 (2)
%VO
Temperature variation
–40
°C < T
A < 85°C
±0.3
%VO
VO
Line regulaltion
Over VI range
±3
mV
Load regulation
Over IO range
±2
mV
Total output variation
Includes set-point, line, load, –40
°C ≤ T
A ≤ 85°C
±1.5 (2)
%VO
RSET = 4.78 k, VO = 1.8 V
90%
RSET = 7.09 k, VO = 1.5 V
88%
η
Efficiency
IO = 10 A
RSET = 12.1 k, VO = 1.2 V
87%
RSET = 20.8 k, VO = 1.0 V
85%
VO Ripple (peak-to-peak)
20-MHz bandwidth
10 (1)
mVPP
ILIM
Overcurrent threshold
Reset, followed by auto-recovery
20
A
ttr
Recovery time
500
s
CO = 1000 μF, Type C
RTT=open
2.5 A/s load step
ΔVtr
VO over/undershoot
25
mV
Transient response
0.5 A to 3.5 A step
ttrTT
Recovery time
800
s
VO = 0.9 V
CO = 2000 μF, Type C
RTT=24.3=k
ΔVtrTT
VO over/undershoot
14
mV
IIL
Track input current (pin 10)
Pin to GND
–130(3)
A
dVtrack/dt
Track slew rate capability
CO ≤ CO (max)
1
V/ms
VI increasing, RUVLO = OPEN
4.3
4.45
Adjustable Under-voltage lockout
UVLOADJ
VI decreasing, RUVLO = OPEN
4.0
4.2
V
(pin 11)
Hysteresis, RUVLO ≤ 52.3 k
0.5
Input high voltage (VIH)
Open(4)
V
Inhibit control (pin 11)
Input low voltage (VIL)
-0.2
0.8
Input low current (IIL), Pin 11 to GND
-235
A
Iin
Input standby current
Inhibit (pin 11) to GND, Track (pin 10) open
5
mA
f s
Switching frequency
Over VI and IO ranges, SmartSync (pin 1) to GND
260
300
340
kHz
fSYNC
Synchronization frequency
240
400
kHz
VSYNCH
SYNC High-Level Input Voltage
2
5.5
V
VSYNCL
SYNC Low-Level Input Voltage
0.8
V
tSYNC
SYNC Minimum Pulse Width
200
nSec
Nonceramic
220 (5)
CI
External input capacitance
F
Ceramic
22 (5)
Capacitance Value
Nonceramic
1000 (6)
10000
F
CO
External output capacitance
Capacitance
× ESR product (C
O × ESR)
1000
10000
F
×m
MTBF
Reliability
Telcordia SR-332, 50% stress, TA= 40°C, ground benign
6.1
106 Hr
(1)
For output voltages less than 1.3 V, the ripple may increase (up to 2
×) when operating at input voltages greater than (V
O × 11). See the
SmartSync section and the TurboTrans section of the datasheet for additional information.
(2)
The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a
tolerance of 1% with 100 ppm/
°C or better temperature stability.
(3)
A low-leakage (<100 nA), open-drain device, such as MOSFET or voltage supervisor IC, is recommended to control pin 10. The
open-circuit voltage is less than 8 Vdc.
(4)
This control pin has an internal pull-up. Do not place an external pull-up on this pin. If it is left open-circuit, the module operates when
input power is applied. A small, low-leakage (<100 nA) MOSFET is recommended for control. For additional information, see the related
application information section.
(5)
A 220 F electrolytic input capacitor is required for proper operation. The electrolytic capacitor must be rated for a minimum of 500 mA
rms of ripple current. An additional 22-F ceramic input capacitor is recommended to reduce rms ripple current.
(6)
1000 F of external low-ESR output capacitance is required for basic operation. See the Capacitor Recommendation section and
TurboTrans Application Information section for more guidance.
4
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