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60-A, 3.3/5-V Input Non-Isolated
Wide-Output Adjust Power Modules
PTH04040W
SLTS238 MARCH 2005
Specifications (Unless otherwise stated, T
A =25°C, VI =5 V, VO =3.3 V, CI =1,000 F, CO =660 F, and IO =IO max)
PTH04040W
Characteristics
Symbols
Conditions
Min
Typ
Max
Units
Output Current
IO
60 °C, 200 LFM airflow
0
—
60 (1)
A
Input Voltage Range
V
I
Over I
O range
2.95 (2)
—
5.5
V
Set-Point Voltage Tolerance
VO tol
—
±2 (3)
%VO
Temperature Variation
Reg
temp
–40 °C <T
A < +85 °C
—
±0.5
—
%V
O
Line Regulation
Reg
line
Over VI range
—
±5
—
mV
Load Regulation
Reg
load
Over I
o range
—
±5
—
mV
Total Output Variation
Reg
tot
Includes set-point, line, load,
—
±3 (3)
%VO
–40 °C
≤ T
A ≤ +85 °C
Output Adjust Range
V adj
VI ≥ 4.8 V (3)
0.8
—
3.6
V
VI < 4.8 V (3)
0.8
—
0.75
× V
I
Efficiency
η
VI =5 V, IO =45 A
RSET = 698
VO = 3.3 V
—
96
—
R
SET = 2.21 k VO = 2.5 V
—
93
—
RSET = 5.49 k VO = 1.8 V
—
90
—
RSET = 8.87 k VO = 1.5 V
—
88
—
RSET = 17.4 k VO = 1.2 V
—
86
—
%
V
I =3.3 V, IO =45 A
R
SET = 4.22 k VO = 2.0 V
—
93
—
RSET = 8.87 k VO = 1.5 V
—
91
—
RSET = 36.5 k VO = 1.0 V
—
87
—
Vo Ripple (pk-pk)
VR
20 MHz bandwidth
All voltages
—
15
—
mVpp
Over-Current Threshold
IO trip
Reset, followed by auto-recovery
—
90
—
A
Transient Response
1 A/s load step, 50 to 100% IOmax,
C
O =660 F
tTR
Recovery Time
—
100
—
Sec
V
TR
VO over/undershoot
—
200
—
mV
Margin Up/Down Adjust
From a given set-point voltage
—
± 5
—
%
Margin Input Current
IIL margin
Pin to GND
—
– 8 (4)
—A
Track Input Current (pin 18)
IIL track
Pin to GND
—
–0.11 (4)
mA
Track Slew Rate Capability
dV/dt
V
TRACK – VO ≤ 50 mV and VTRACK < VO(nom)
—
1
V/ms
Under-Voltage Lockout
UVLO
Pin 8 open
on-threshold
—
2.6 (5)
—
V
hysterisis
—
0.6 (5)
—
Inhibit Control (pin7)
Referenced to GND
Input High Voltage
VIH
2.5
—
Open (6)
V
Input Low Voltage
VIL
–0.2
—
0.5
Input Low Current
IIL inhibit
Pin to GND
—
–0.5
—
mA
Input Standby Current
II inh
Inhibit (pin 7) to GND
—
60
—
mA
Switching Frequency
S
Over VI and IO ranges
0.9
1.05
1.2
MHz
External Input Capacitance
CI
940 (7)
——F
External Output Capacitance
CO
capacitance value
non-ceramic
660 (8)
—
14,000 (9)
F
ceramic
—
400
F
Equiv. series resistance (non-ceramic)
2
(10)
——m
Reliability
MTBF
Per Bellcore TR-332
2.1
—
106 Hrs
50 % stress, TA =40 °C, ground benign
Notes: (1) See SOA curves or consult factory for appropriate derating.
(2) The minimum input voltage is 2.95 V or 1.34
× V
O, whichever is greater.
(3) The set-point voltage tolerance is affected by the tolerance of R
SET. The stated limit is unconditionally met if RSET has a tolerance of 1% with 100 ppm/°C
or better temperature stability.
(4) A small low-leakage (<100 nA) MOSFET is recommended to control this pin. The open-circuit voltage is less than 1 Vdc.
(5) These are the default voltages. They may be adjusted using the ‘UVLO Prog’ control input. Consult the Application Information for further guidance.
(6) This control pin has an internal pull-up to V
I. If it is left open-circuit the module will operate when input power is applied. A small low-leakage
(<100 nA) MOSFET is recommended for control. For further information, consult the related application note.
(7) A minimum capacitance of 940 F is required at the input for proper operation. The capacitance must be rated for a minimum of 400 mArms of ripple
current.
(8) A minimum value of output capacitance is required for proper operation. Adding additional capacitance at the load will further improve transient response.
(9) This is the calculated maximum. The minimum ESR requirement will often result in a lower value. Consult the Application Information for further guidance.
(10) This is the typcial ESR for all the electrolytic (non-ceramic) output capacitance. Use 4 m
as the minimum when using max-ESR values to calculate.