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參數(shù)資料
| 型號： | PTH03060YAZT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 電源模塊 |
| 英文描述： | 1-OUTPUT DC-DC REG PWR SUPPLY MODULE |
| 封裝： | ROHS COMPLIANT, DIP-10 |
| 文件頁數(shù)： | 13/19頁 |
| 文件大?。?/td> | 823K |
| 代理商： | PTH03060YAZT |
www.ti.com
ELECTRICAL SPECIFICATIONS
PTH03060Y
PTH05060Y, PTH12060Y
SLTS222A–MARCH 2004–REVISED OCTOBER 2005
TA =25°C; nominal VIN;VREF =1.25V;CIN,CO1, and CO2 = typical values; and IO =IOmax (unless otherwise stated)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
IO
Output current
Over VREF range
Continuous
0
±10(1)
A
PTH03060Y
2.95
3.65
VIN
Input voltage range
Over IO range
PTH05060Y
4.5
5.5
V
PTH12060Y
10.8
13.2
VREF
Tracking range for VREF
0.55
1.8
V
|VTT–VREF|
Tracking tolerance to VREF
Over line, load and temperature
–10
10
mV
PTH03060Y
86%
η
Efficiency
Io = 8 A
PTH05060Y
86%
PTH12060Y
83%
Vr
Vo Ripple (pk-pk)
20 MHz bandwidth
20
mVpp
Io trip
Overcurrent threshold
Reset, followed by auto recovery
20
A
ttr
Recovery time
30
sec
15 A/s load step, from:
Load transient response
–1.5 A to 1.5 A
Vtr
VO over/undershoot
25
40
mV
PTH03060Y
2.45
2.8
VIN Increasing
PTH05060Y
4.3
4.45
V
PTH12060Y
9.5
10.4
UVLO
Under-voltage lockout
PTH03060Y
2.0
2.40
VIN Dncreasing
PTH05060Y
3.4
3.7
V
PTH12060Y
8.8
9
Inhibit control (pin 4)
VIN–0.5
Open(2)
VIH
V
Input high voltage
Referenced to GND
Inhibit control (pin 4)
–0.2
0.6
VIL
V
Input low voltage
Inhibit control (pin 4)
IIL inhibit
Pin to GND
130
A
Input low curent
IIN inh
Input standby current
Inhibit control (pin 4) to GND
10
mA
PTH03060Y/PTH05060Y
250
300
350
f s
Switching frequency
Over VIN and IO ranges
kHz
PTH12060Y
200
250
300
PTH03060Y/PTH05060Y
330(3)
CIN
External input capacitance
F
PTH12060Y
560
Capacitance value: Nonceramic
PTH03060Y/PTH05060Y
470(4)
5500(5)
F
PTH12060Y
940(4)
5500(5)
CO1, CO2
External output capacitance
PTH03060Y/PTH05060Y
200(4)
300
Capacitance value: Ceramic
F
PTH12060Y
400(4)
600
Equuivanent series resistance (non-ceramic)
4(6)
m
MTBF
Reliability
Per Bellcore TR-332 50 % stress, TA =40°C, ground benign
6
106 Hrs
(1) Rating is conditional on the module being directly soldered to a 4-layer PCB with 1 oz. copper. See the SOA curves or contact the
factory for appropriate derating.
(2) This control pin has an internal pull-up to the input voltage VIN. If it is left open-circuit the module will operate when input power is
applied. A small low-leakage (<100 nA) MOSFET is recommended for control. For further information, consult the related application
note.
(3) An input capacitor is required for proper operation. The capacitor must be rated for a minimum of 300 mA rms (750 mA rms for 12-V
input) of ripple current.
(4) The minimum value of external output capacitance value ensures that VTT meets the specified transient performance requirements for
the memory bus terminations. Lower values of capacitance may be possible when the measured peak change in output current is
consistently less than 3 A.
(5) This is the calculated maximum. The minimum ESR limitation will often result in a lower value. Consult the capacitor application notes
for further guidance.
(6) This is the typcial ESR for all the electrolytic (non-ceramic) output capacitance. Use 7 m as the minimum when using max-ESR values
to calculate.
3
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