參數(shù)資料
型號(hào): PT7V4050
英文描述: PLL with quartz stabilized VCXO?
中文描述: 與穩(wěn)定的壓控石英鎖相環(huán)?
文件頁數(shù): 1/5頁
文件大?。?/td> 1807K
代理商: PT7V4050
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PT0147(11/03)
Ver: 0
1
Data Sheet
PT7V4027 VCXO
Product Features
3.3V operating voltage
Uses an inexpensive external crystal
On-chip VCXO with pull range of 240ppm
VCXO tuning voltage from 0 to 3.3V
10mA output driver at CMOS levels
Available in SOIC package
Logic Block Diagram
Pin Configuration
Pin Description
Pin Number
1,8
Pin Name
X1, X2
Type
I
Description
Crystal Connection
Output State Control, enables output when high or open, sets
output high impedance when low.
No Connect
Voltage Input to VCXO
Ground
Clock Output
Power Supply
Note
7
OE
I
2
3
4
5
6
NC
V
IN
GND
CLKOUT
V
CC
I
PWR
O
PWR
Note: 0.1
μ
F or 0.01
μ
F bypass capacitor is required.
General Description
The PT7V4027 is a low-cost, high-performance 3.3V
VCXO, designed to replace expensive VCXO modules.
The on-chip Voltage Controlled Crystal Oscillator accepts a
0 to 3.3V input voltage to cause clocks to vary by
±
120ppm. This device uses an inexpensive external
pullable crystal at 27 MHz to produce the same output
frequency.
The PT7V4027 is designed for Set-Top Box applications.
OE
CC
OE
PT7V4027
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