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參數(shù)資料
| 型號(hào)： | PT5071C |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Analog IC |
| 中文描述： | 模擬IC |
| 文件頁數(shù)： | 1/3頁 |
| 文件大?。?/td> | 130K |
| 代理商： | PT5071C |
For technical support and more information, see inside back cover or visit www.ti.com/powertrends
PT5071—12V
1.5 Amp, 12V Step-Up/Step-Down
Integrated Switching Regulator
SLTS139
(Revised 2/7/2001)
Standard Application
C
1
, C
2
= Required 100μF electrolytic (See footnotes)
Ordering Information
PT 5071
¨
= +12 Volts
PT Series Suffix
(PT1234
X
)
Case/Pin
Configuration
Vertical Through-Hole
Horizontal Through-Hole
Horizontal Surface Mount
(For dimensions and PC board layout,
see Package Styles 1360 and 1370.)
N
A
C
Pin Function
1
N/C
2
UVLO Adj
3
STBY*
4
V
in
5
V
in
6
V
in
7
GND
8
GND
9
GND
10
GND
11
V
out
12
V
out
13
V
out
14
V
out
Adjust
Features
Single-Device:
+12V Output, 7-16V Input
84% Efficiency
14-Pin Excalibur Package
Output Current Limit
Adjustable Output Voltage
Adjustable Undervoltage Lockout
Solderable Copper Case
Description
The PT5071 is a 1.5-ampere rated step-up/
step-down Integrated Switching Regulator
(ISR) that provides a tightly regulated 12V
output voltage from a 7V to 16V variable
input source. This high-performance ISR has
applications in systems where the input
voltage straddles the desired 12V output.
The regulator has an adjustable output
voltage and input start-up threshold, and a
standby function for power conservation.
Pin-Out Information
C
1
+
C
2
+
PT5071
UVadj
GND
V
IN
V
OUT
V
0
adj
STBY*
4-6
11-13
2
3
7-10
14
V
IN
V
OUT
STBY
GND
GND
UV
ADJ
For Inhibit pin:
Open = output enabled
Ground = output disabled
Specifications
Characteristics
(T
a
= 25°C unless noted)
Output Current
Current Limit
Input Voltage Range
Output Voltage Tolerance
PT5071
Typ
Symbols
Conditions
Min
Max
Units
I
o
I
lim
V
in
V
o
Over V
in
Range
V
in
= 12V
0.1A
≤
I
o
≤
I
o
max
V
=12V, I
o
=I
max
–40°C
≤
T
a
≤
+85°C
0.1
(1)
—
7.0
—
4.0
—
±1.0
1.5
A
A
V
%
16.0
Output Voltage Adjust Range
Line Regulation
Load Regulation
Vo Ripple/Noise
Transient Response
with C
2
= 100μF
Efficiency
Switching Frequency
V
o
adj
Reg
line
Reg
load
V
n
t
tr
V
os
η
o
10
—
—
—
—
—
—
—
—
±0.5
±0.5
±2.0
200
1.0
83
550
15
V
%
%
%
μSec
%V
o
%
kHz
Over V
in
Range, I
o
=I
o
max
V
in
=12V, 0.1
≤
I
o
≤
I
o
max
V
in
=12V, I
o
=I
o
max
Load step from 50% to 100% I
o
max, V
in
=12V
V
o
over/undershoot
V
in
=12V, V
o
=12V, I
o
=1.5A
Over V
in
Range
0.1A
≤
I
o
≤
I
o
max
Over V
in
range
±3.0
—
—
—
—
Absolute Maximum
Operating Temperature Range
Storage Temperature
Mechanical Shock
T
a
–40
(2)
—
+85
(3)
°C
T
s
—
Per Mil-STD-883D, Method 2002.3 , 1 msec,
Half Sine, mounted to a fixture
Per Mil-STD-883D, Method 2007.2,
20-2000 Hz, Soldered in a PC board
—
–40
—
—
TBD
+125
—
°C
G’s
Mechanical Vibration
—
—
TBD
25
—
—
G’s
grams
Weight
—
Notes:
1. The regulator will operate down to no load with reduced specifications.
2. For operating temperatures below 0°C, it is recommended that tantalum capacitors be used at both the input and output.
3. See SOA curves, or contact the factory for derating guidelines.
Input/Output Capacitors:
The PT5071 regulator requires a 100μF electrolytic capacitor at the input and output for proper operation in all applications. The ESR
(equivalent series resistance) of both capacitors must be less than 250m
@100kHz. In addition, C
1
and C
2
must be rated to a minimum of 300mArms ripple current.
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