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參數資料
| 型號： | PT5029N |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 基準電壓源/電流源 |
| 英文描述： | RADIATION HARDENED HIGH EFFICIENCY, 5 AMP SWITCHING REGULATORS |
| 中文描述： | 抗輻射高效，5安培開關穩(wěn)壓器 |
| 文件頁數： | 1/6頁 |
| 文件大小： | 141K |
| 代理商： | PT5029N |
For technical support and more information, see inside back cover or visit www.ti.com
Ordering Information
PT 5021
= -3.3 Volts
PT 5022
= -5 Volts
PT 5023
= -9 Volts
PT 5024
= -12 Volts
PT 5025
= -15 Volts
PT 5026
= -5.2 Volts
PT 5027
= -8.0 Volts
PT 5028
= -6.5 Volts
PT 5029
= -5.5 Volts
PT 5030
= -6.0 Volts
PT 5031
= -1.7 Volts
Pin
1
2
3
Function
V
in
GND
V
out
Standard Application
C
1
= Optional ceramic (1-5μF)
C
2
= Required Electrolytic (100μF)
Features
Negative Output
Input Voltage Range:
+4.75 to +7 Volts
Laser-Trimmed
Small Footprint
Soft Start
5-Pin Mount Option
(Suffixes L & M)
Description
The PT5020 series of integrated
switching regulators (ISRs) convert a
positive input voltage, typically +5V, to a
negative output voltage for a wide range of
analog and datacom applications.
These Plus to Minus ISRs incorporate
a “Buck-Boost” topology and are packaged
in the 3-pin, single in-line pin (SIP)
package configuration.
NOTE: PT5020 ISRs are not Short-Circuit Protected.
Positive Input/Negative Output
Integrated Switching Regulator
PT5020 Series
Pin-Out Information
SLTS025B
(Revised 12/19/2001)
PT Series Suffix
(PT1234
x
)
Case/Pin
Configuration
Vertical
Horizontal
SMD
Horizontal, 2-pin Tab
SMD, 2-Pin Tab
* Previously known as package styles 100/110.
(Reference the applicable package code drawing
for the dimensions and PC board layout)
Order
Suffix
N
A
C
M
L
Package
C ode *
(EAD)
(EAA)
(EAC)
(EAM)
(EAL)
PT5020
3
2
1
C
100μF+
C
1
–V
out
COM
COM
+V
in
Specifications
(Unless otherwise stated, T
a
=25°C, V
in
=5V, I
o
=I
o
max, C
2
=100μF)
PT5020 SERIES
Typ
—
—
—
—
—
Characteristics
Output Current
Symbol
I
o
Conditions
Over V
in
range
Min
0.25
(1)
0.10
(1)
0.10
(1)
0.10
(1)
4.75
Max
1.0
0.60
0.50
0.30
7
(2)
Units
V
o
= –1.7V to –6.5V
V
o
= –9V
V
o
= –12V
V
o
= –15V
A
Input Voltage Range
Output Voltage Tolerance
V
in
V
o
Over I
o
range
Over V
Range
T
a
= -20°C to SOA limit
(3)
Over V
in
range
I
o
min
≤
I
o
≤
I
o
max
I
o
=0.5 I
o
max
20MHz bandwidth
25% load change
V
o
over/undershoot
V
—
±1.5
±3
%V
o
Line Regulation
Load Regulation
Efficiency
V
o
Ripple (pk-pk)
Transient Response
Reg
line
Reg
load
η
V
r
t
tr
—
—
—
—
—
—
—
—
—
0.8
500
-20
—
±0.5
±0.5
75
±2
500
3.0
150
1.0
(3)
1.0
1
650
—
50
±1
±1
—
±5
—
5.0
—
—
—
1.2
800
+85
(4)
—
%V
o
%V
o
%
%V
o
μSec
%V
o
%I
o
max
A
mSec
MHz
kHz
°C
°C/W
Current Limit
Inrush Current
I
lim
I
ir
t
ir
s
On start up
Switching Frequency
Over I
o
range
V
o
=1.7 to 8V
V
o
≥
8 V
Operating Temperature Range
Thermal Resistance
T
a
θ
ja
—
Free Air Convection
(40-60LFM)
Storage Temperature
Mechanical Shock
T
s
-40
—
+125
°C
Per Mil-STD-883D, Method 2002.3
1 msec, Half Sine, mounted to a fixture
Suffixes N, A, & C
Suffixes L & M
Suffixes N, A, & C
Suffixes L & M
—
500
—
G’s
Mechanical Vibration
Per Mil-STD-883D, 20-2000 Hz
Weight
—
—
—
—
5
20
4.5
6.5
(5)
—
—
—
—
G’s
grams
Notes:
(1) The ISR will operate at no load with reduced specifications.
(2) For applications with input voltages greater than 7 VDC, use the PT78NR100 Series.
(3) The inrush current stated is above the normal input current for the associated output load.
(4) See Safe Operating Area curves or consult the factory for the appropriate derating
(5) The tab pins on the 5-pin mount package types (suffixes L & M) must be soldered. For more information see the applicable package outline drawing.
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