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參數資料
| 型號： | PSF210 |
| 英文描述： | Analog IC |
| 中文描述： | 模擬IC |
| 文件頁數： | 234/317頁 |
| 文件大小： | 3334K |
| 代理商： | PSF210 |
PSB 2115
PSF 2115
Detailed Register Description
Semiconductor Group
234
11.97
4.2.21
Value after reset: 02
H
CCR1 - Channel Configuration Register 1 (READ/WRITE)
PU … Switches between Power Up and Power Down mode
0 … power down (standby)
1 … power up (active)
Note: In order to switch the IPAC in power down mode it is necessary to program ITF=0
together with PU=0.
SC ... Serial Port Configuration
0 … NRZ data encoding
1 … NRZI data encoding
ITF … Interframe Time Fill
ITF determines the idle state (= no data to send) of the transmit data pin (DU)
0 … Continuous IDLE sequences are output (DU pin remains in the ‘1’ state)
1 … Continuous FLAG sequences are output (‘01111110’ bit patterns)
Note:
ITF must be set to ’0’ for power down mode.
4.2.22
Value after reset: (not defined)
TSAX - Time-Slot Assignment Register Transmit (WRITE)
TSNX … Time-Slot Number Transmit
Selects one of up 64 possible time-slots (00
H
– 3F
H
) in which data is transmitted. The
number of bits per time-slot can be programmed via XCCR.
XCS2, XCS1 … Transmit Clock Shift, Bit 2-1
Together with the XCS0 in CCR2, the transmit clock shift can be adjusted.
7
0
CCR1
PU
SC
0
0
ITF
0
1
0
(2F/6F)
7
2
1
0
TSAX
TSNX
XCS2 XCS1
(30/70)
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相關代理商/技術參數 |
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| PSF21150 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:IPAC-X ISDN PC ADAPTER CIRCUIT |
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| PSF21150F-V14 | 制造商:Infineon Technologies AG 功能描述:ISDN S/T/U HDLC Interface 1-Line 192Kbps 3.3V 64-Pin TQFP |
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