• 參數(shù)資料
    型號(hào): PSD935G1-A-90UI
    廠商: 意法半導(dǎo)體
    英文描述: Configurable Memory System on a Chip for 8-Bit Microcontrollers
    中文描述: 在8片位微控制器可配置存儲(chǔ)系統(tǒng)
    文件頁(yè)數(shù): 12/91頁(yè)
    文件大小: 488K
    代理商: PSD935G1-A-90UI
    PSD935G2
    PSD9XX Family
    11
    Table 6 shows the offset addresses to the PSD935G2 registers relative to the CSIOP base
    address. The CSIOP space is the 256 bytes of address that is allocated by the user to the
    internal PSD935G2 registers. Table 6 provides brief descriptions of the registers in CSIOP
    space. For a more detailed description, refer to section 9.
    7.0 PSD935G2
    Register
    Description and
    Address Offset
    Register Name
    Port A
    Port B
    Port C
    Port D
    Port E
    Port F
    Port G
    Other*
    Description
    Data In
    00
    01
    10
    11
    30
    40
    41
    Reads Port pin as input,
    MCU I/O input mode
    Selects mode between
    MCU I/O or Address Out
    Stores data for output
    to Port pins, MCU I/O
    output mode
    Configures Port pin as
    input or output
    Configures Port pins as
    either CMOS or Open
    Drain on some pins, while
    selecting high slew rate
    on other pins.
    Read only – Flash Sector
    Protection
    Read only – PSD Security
    and Flash Boot Sector
    Protection
    Power Management
    Register 0
    Power Management
    Register 2
    Page Register
    Places PSD memory
    areas in Program and/or
    Data space on an
    individual basis.
    Read only – Flash and
    SRAM size
    Read only – Boot type
    and size
    Control
    32
    42
    43
    Data Out
    04
    05
    14
    15
    34
    44
    45
    Direction
    06
    07
    16
    17
    36
    46
    47
    Drive Select
    08
    09
    18
    19
    38
    49
    Flash Protection
    C0
    Flash Boot
    Protection
    C2
    PMMR0
    B0
    PMMR2
    B4
    Page
    E0
    VM
    E2
    Memory_ID0
    F0
    Memory_ID1
    F1
    Table 6. Register Address Offset
    相關(guān)PDF資料
    PDF描述
    PSD935G1-B-12J Configurable Memory System on a Chip for 8-Bit Microcontrollers
    PSD935G1-B-12JI Configurable Memory System on a Chip for 8-Bit Microcontrollers
    PSD935G1-B-12M Configurable Memory System on a Chip for 8-Bit Microcontrollers
    PSD935G1-B-12MI Configurable Memory System on a Chip for 8-Bit Microcontrollers
    PSD935G1-B-12U Configurable Memory System on a Chip for 8-Bit Microcontrollers
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