參數(shù)資料
型號(hào)： PSD935F3V-15U
廠商： 意法半導(dǎo)體
英文描述： Configurable Memory System on a Chip for 8-Bit Microcontrollers
中文描述： 在8片位微控制器可配置存儲(chǔ)系統(tǒng)
文件頁數(shù)： 40/91頁
文件大?。?/td> 488K
代理商： PSD935F3V-15U
PSD935G2
PSD9XX Family
39
The
PSD935G2
Functional
Blocks
(cont.)
9.3.3 Microcontroller Interface Examples
Figures 15 through 19 show examples of the basic connections between the PSD935G2
and some popular microcontrollers. The PSD935G2 Control input pins are labeled as to
the microcontroller function for which they are configured. The MCU interface is specified
using the PSDsoft.
9.3.3.1 80C31
Figure 15 shows the interface to the 80C31, which has an 8-bit multiplexed address/data
bus. The lower address byte is multiplexed with the data bus. The microcontroller control
signals PSEN, RD, and WR may be used for accessing the internal memory components
and I/O Ports. The ALE input (pin PD0) latches the address.
9.3.3.2 80C251
The Intel 80C251 microcontroller features a user-configurable bus interface with four
possible bus configurations, as shown in Table 15.
Configuration 1 is 80C31 compatible, and the bus interface to the PSD935G2 is identical to
that shown in Figure 15. Configurations 2 and 3 have the same bus connection as shown
in Figure 16. There is only one read input (PSEN) connected to the Cntl1 pin on the
PSD935G2. The A16 connection to the PA0 pin allows for a larger address input to the
PSD935G2. Configuration 4 is shown in Figure 17. The RD signal is connected to Cntl1
and the PSEN signal is connected to the CNTL2.
The 80C251 has two major operating modes: Page Mode and Non-Page Mode. In
Non-Page Mode, the data is multiplexed with the lower address byte, and ALE is active in
every bus cycle. In Page Mode, data D[7:0] is multiplexed with address A[15:8]. In a bus
cycle where there is a Page hit, the ALE signal is not active and only addresses A[7:0]
are changing. The PSD935G2 supports both modes. In Page Mode, the PSD bus timing
is identical to Non-Page Mode except the address hold time and setup time with respect
to ALE is not required. The PSD access time is measured from address A[7:0] valid to
data in valid.
相關(guān)PDF資料
PDF描述
PSD935F3V-15UI Configurable Memory System on a Chip for 8-Bit Microcontrollers
FS7VS-5 Nch POWER MOSFET HIGH-SPEED SWITCHING USE
FS8160 1.1 GHz/1.1 GHz Dual Phase-locked Loop IC
FS8853-13PI 300mA LDO Linear Regulator
FS8853-18CA 300mA LDO Linear Regulator
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PSD935G2-90U 功能描述:SPLD - 簡(jiǎn)單可編程邏輯器件 TQFP-80 5V 4M 90N RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
PSD935G2V-90U 功能描述:SPLD - 簡(jiǎn)單可編程邏輯器件 U 511-PSD835G2V-90U RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
PSD954F2-90J 功能描述:SPLD - 簡(jiǎn)單可編程邏輯器件 U 511-PSD854F2-90J RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
PSD954F2-90M 功能描述:SPLD - 簡(jiǎn)單可編程邏輯器件 U 511-PSD854F2-90M RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
PSD954F2V-90J 功能描述:SPLD - 簡(jiǎn)單可編程邏輯器件 5.0V 2M 90ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*