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    參數(shù)資料
    型號: PSD935F2-A-90MI
    廠商: 意法半導(dǎo)體
    英文描述: Configurable Memory System on a Chip for 8-Bit Microcontrollers
    中文描述: 在8片位微控制器可配置存儲系統(tǒng)
    文件頁數(shù): 24/91頁
    文件大?。?/td> 488K
    代理商: PSD935F2-A-90MI
    PSD935G2
    PSD9XX Family
    23
    9.1.1.7.2 Data Toggle
    (cont.)
    It is suggested (as with all Flash memories) to read the location again after the embedded
    programming algorithm has completed to compare the word that was written to Flash with
    the word that was intended to be written.
    When using the Data Toggle method after an erase instructin, Figure 5 still applies. DQ6
    will toggle until the erase operation is complete. A
    1
    on DQ5 will indicate a timeout failure
    of the erase operation, a
    0
    indicates no error. The MCU can read any even location within
    the sector being erased to get DQ6 and DQ5.
    PSDsoft generates ANSI C code functions which implement these Data Toggling
    algorithms.
    The
    PSD935G2
    Functional
    Blocks
    (cont.)
    Figure 5. Data Toggle Flow Chart
    START
    READ
    DQ5 & DQ6
    NO
    YES
    NO
    YES
    YES
    NO
    =
    TOGGLE
    DQ5
    =1
    =
    TOGGLE
    READ DQ6
    FAIL
    Program/Erase
    Operation Failed
    Issue Reset Instruction
    PASS
    Program/Erase
    Operation is
    Completed
    相關(guān)PDF資料
    PDF描述
    PSD935F2-A-90U Configurable Memory System on a Chip for 8-Bit Microcontrollers
    PSD935F2-A-90UI Configurable Memory System on a Chip for 8-Bit Microcontrollers
    PSD935F2-B-12J Configurable Memory System on a Chip for 8-Bit Microcontrollers
    PSD935F2-B-12JI Configurable Memory System on a Chip for 8-Bit Microcontrollers
    PSD935F2-B-12M Configurable Memory System on a Chip for 8-Bit Microcontrollers
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