• 參數(shù)資料
    型號(hào): PSD854412JIT
    廠商: 意法半導(dǎo)體
    英文描述: Flash In-System Programmable ISP Peripherals For 8-bit MCUs
    中文描述: Flash在系統(tǒng)可編程ISP的外設(shè)的8位微控制器
    文件頁(yè)數(shù): 29/110頁(yè)
    文件大?。?/td> 1737K
    代理商: PSD854412JIT
    29/110
    PSD813F2, PSD833F2, PSD834F2, PSD853F2, PSD854F2
    SRAM
    The SRAM is enabled when SRAM Select (RS0)
    from the DPLD is High. SRAM Select (RS0) can
    contain up to two product terms, allowing flexible
    memory mapping.
    The SRAM can be backed up using an external
    battery. The external battery should be connected
    to Voltage Stand-by (V
    STBY
    , PC2). If you have an
    external battery connected to the PSD, the con-
    tents of the SRAM are retained in the event of a
    power loss. The contents of the SRAM are re-
    tained so long as the battery voltage remains at
    2 V or greater. If the supply voltage falls below the
    battery voltage, an internal power switch-over to
    the battery occurs.
    PC4 can be configured as an output that indicates
    when power is being drawn from the external bat-
    tery. Battery-on Indicator (VBATON, PC4) is High
    with the supply voltage falls below the battery volt-
    age and the battery on Voltage Stand-by (V
    STBY
    ,
    PC2) is supplying power to the internal SRAM.
    SRAM Select (RS0), Voltage Stand-by (V
    STBY
    ,
    PC2) and Battery-on Indicator (VBATON, PC4)
    are all configured using PSDsoft Express Configu-
    ration.
    相關(guān)PDF資料
    PDF描述
    PSD854412JT Flash In-System Programmable ISP Peripherals For 8-bit MCUs
    PSD854412MIT Flash In-System Programmable ISP Peripherals For 8-bit MCUs
    PSD854412MT Flash In-System Programmable ISP Peripherals For 8-bit MCUs
    PSD854415JIT Flash In-System Programmable ISP Peripherals For 8-bit MCUs
    PSD854415JT Flash In-System Programmable ISP Peripherals For 8-bit MCUs
    相關(guān)代理商/技術(shù)參數(shù)
    參數(shù)描述
    PSD854F2-15J 制造商:STMicroelectronics 功能描述:4556DIE2HR - Trays
    PSD854F2-70J 功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 2M 70ns RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
    PSD854F2-70M 功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 2M 70ns RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
    PSD854F2-90J 功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 2M 90ns RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
    PSD854F2-90JI 功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 2M 90ns RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100