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      參數(shù)資料
      型號(hào)： PSD835G1V-A-12B81I
      廠商： 意法半導(dǎo)體
      英文描述： Configurable Memory System on a Chip for 8-Bit Microcontrollers
      中文描述： 在8片位微控制器可配置存儲(chǔ)系統(tǒng)
      文件頁(yè)數(shù)： 55/110頁(yè)
      文件大小： 570K
      代理商： PSD835G1V-A-12B81I
      PSD8XX Family
      PSD835G2
      54
      The
      PSD835G2
      Functional
      Blocks
      (cont.)
      9.4.2 Port Operating Modes
      The I/O Ports have several modes of operation. Some modes can be defined using
      PSDsoft, some by the microcontroller writing to the Registers in CSIOP space, and some
      by both. The modes that can only be defined using PSDsoft must be programmed into the
      device and cannot be changed unless the device is reprogrammed. The modes that can be
      changed by the microcontroller can be done so dynamically at run-time. The PLD I/O,
      Data Port, Address Input, Peripheral I/O and MCU Reset modes are the only modes that
      must be defined before programming the device. All other modes can be changed by the
      microcontroller at run-time.
      Table 16 summarizes which modes are available on each port. Table 17 shows how and
      where the different modes are configured. Each of the port operating modes are described
      in the following subsections.
      Port Mode
      Port A
      Port B
      Port C
      Port D
      Port E
      Port F
      Port G
      MCU I/O
      Yes
      Yes
      Yes
      Yes
      Yes
      Yes
      Yes
      PLD I/O
      McellA Outputs
      McellB Outputs
      Additional Ext. CS Outputs
      PLD Inputs
      Yes
      No
      No
      Yes
      No
      Yes
      No
      Yes
      No
      No
      Yes
      Yes
      No
      No
      No
      Yes
      No
      No
      No
      No
      No
      No
      Yes
      Yes
      No
      No
      No
      No
      Address Out
      No
      No
      No
      No
      Yes
      (A7-0)
      Yes
      (A7-0)
      Yes
      (A7-0)
      or
      (A15-8)
      Address In
      Yes
      Yes
      Yes
      Yes
      No
      Yes
      No
      Data Port
      No
      No
      No
      No
      No
      Yes
      No
      Peripheral I/O
      No
      No
      No
      No
      No
      Yes
      No
      JTAG ISP
      No
      No
      No
      No
      Yes*
      No
      No
      Table 16. Port Operating Modes
      *
      Can be multiplexed with other I/O functions.
      相關(guān)PDF資料
      PDF描述
      PSD835G1V-A-12J Configurable Memory System on a Chip for 8-Bit Microcontrollers
      PSD835G1V-A-12JI Configurable Memory System on a Chip for 8-Bit Microcontrollers
      PSD835G1V-A-12M Configurable Memory System on a Chip for 8-Bit Microcontrollers
      PSD835G1V-A-12MI Configurable Memory System on a Chip for 8-Bit Microcontrollers
      PSD835G1V-A-12U Configurable Memory System on a Chip for 8-Bit Microcontrollers
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