參數(shù)資料
型號: PSD835F3-A-20M
廠商: 意法半導體
英文描述: Configurable Memory System on a Chip for 8-Bit Microcontrollers
中文描述: 在8片位微控制器可配置存儲系統(tǒng)
文件頁數(shù): 25/110頁
文件大?。?/td> 570K
代理商: PSD835F3-A-20M
PSD8XX Family
PSD835G2
24
9.1.1.7.2 Data Toggle
(cont.)
It is suggested (as with all Flash memories) to read the location again after the embedded
programming algorithm has completed to compare the word that was written to Flash with
the word that was intended to be written.
When using the Data Toggle method after an erase instructin, Figure 5 still applies. DQ6
will toggle until the erase operation is complete. A
1
on DQ5 will indicate a timeout failure
of the erase operation, a
0
indicates no error. The MCU can read any even location within
the sector being erased to get DQ6 and DQ5.
PSDsoft generates ANSI C code functions which implement these Data Toggling
algorithms.
The
PSD835G2
Functional
Blocks
(cont.)
Figure 5. Data Toggle Flow Chart
START
READ
DQ5 & DQ6
NO
YES
NO
YES
YES
NO
=
TOGGLE
DQ5
=1
=
TOGGLE
READ DQ6
FAIL
Program/Erase
Operation Failed
Issue Reset Instruction
PASS
Program/Erase
Operation is
Completed
相關PDF資料
PDF描述
PSD835F3-A-20MI Configurable Memory System on a Chip for 8-Bit Microcontrollers
PSD835F3-A-20U Configurable Memory System on a Chip for 8-Bit Microcontrollers
PSD835F3-A-20UI Configurable Memory System on a Chip for 8-Bit Microcontrollers
PSD835F3-A-70B81 Configurable Memory System on a Chip for 8-Bit Microcontrollers
PSD835F3-A-70B81I Configurable Memory System on a Chip for 8-Bit Microcontrollers
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