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    參數(shù)資料
    

    


    


    
型號：
PSD8335V20MT

    

    
廠商：
意法半導體

    

    
英文描述：
Flash In-System Programmable ISP Peripherals For 8-bit MCUs

    

    
中文描述：
Flash在系統(tǒng)可編程ISP的外設(shè)的8位微控制器

    

    
文件頁數(shù)：
57/110頁

    

    
文件大?。?/td>
1737K

    

    
代理商：
PSD8335V20MT


    

    

    

	
    
    
    

    
    
	
    57/110
    PSD813F2, PSD833F2, PSD834F2, PSD853F2, PSD854F2
    Table 26. Drive Register Pin Assignment
    Note: 1. NA = Not Applicable.
    Port Data Registers
    The Port Data Registers, shown in Table 
    27
    , are
    used by the MCU to write data to or read data from
    the ports. Table 
    27
     shows the register name, the
    ports having each register type, and MCU access
    for each register type. The registers are described
    below.
    Data In
    Port pins are connected directly to the Data In buff-
    er. In MCU I/O input mode, the pin input is read
    through the Data In buffer.
    Data Out Register
    Stores output data written by the MCU in the MCU
    I/O output mode. The contents of the Register are
    driven out to the pins if the Direction Register or
    the output enable product term is set to ’1.’ The
    contents of the register can also be read back by
    the MCU.
    Output Macrocells (OMC).
     The CPLD Output
    Macrocells (OMC) occupy a location in the MCU’s
    address space. The MCU can read the output of
    the Output Macrocells (OMC). If the OMC Mask
    Register bits are not set, writing to the macrocell
    loads data to the macrocell flip-flops. See the sec-
    tion entitled 
    PLDS, page 33
    .
    OMC Mask Register
    Each OMC Mask Register bit corresponds to an
    Output Macrocell (OMC) flip-flop. When the OMC
    Mask Register bit is set to a 1, loading data into the
    Output Macrocell (OMC) flip-flop is blocked. The
    default value is 0 or unblocked.
    Table 27. Port Data Registers
    Drive 
    Register
    Bit 7
    Bit 6
    Bit 5
    Bit 4
    Bit 3
    Bit 2
    Bit 1
    Bit 0
    Port A
    Open
    Drain
    Open
    Drain
    Open
    Drain
    Open
    Drain
    Slew
    Rate
    Slew
    Rate
    Slew
    Rate
    Slew
    Rate
    Port B
    Open
    Drain
    Open
    Drain
    Open
    Drain
    Open
    Drain
    Slew
    Rate
    Slew
    Rate
    Slew
    Rate
    Slew
    Rate
    Port C
    Open
    Drain
    Open
    Drain
    Open
    Drain
    Open
    Drain
    Open
    Drain
    Open
    Drain
    Open
    Drain
    Open
    Drain
    Port D
    NA
    1
    NA
    1
    NA
    1
    NA
    1
    NA
    1
    Slew
    Rate
    Slew
    Rate
    Slew
    Rate
    Register Name 
    Port 
    MCU Access
    Data In 
    A,B,C,D 
    READ – input on pin
    Data Out 
    A,B,C,D 
    WRITE/READ
    Output Macrocell 
    A,B,C 
    READ – outputs of macrocells
    WRITE – loading macrocells flip-flop
    Mask Macrocell 
    A,B,C 
    WRITE/READ – prevents loading into a given
    macrocell
    Input Macrocell 
    A,B,C 
    READ – outputs of the Input Macrocells
    Enable Out 
    A,B,C 
    READ – the output enable control of the port driver
    
    
    
    
    
    


    


    

    相關(guān)PDF資料
    		

    PDF描述
    		

    
    

    
PSD8335V70MT
18-Line 5V SE Terminator for SCSI and Fast SCSI 28-SOIC 0 to 70

    

    
PSD8335V90MT
Flash In-System Programmable ISP Peripherals For 8-bit MCUs

    

    
PSD833F2
18-Line 5V SE Terminator for SCSI and Fast SCSI 28-SOIC 0 to 70

    

    
PSD834220JT
Flash In-System Programmable ISP Peripherals For 8-bit MCUs

    

    
PSD834220MIT
Flash In-System Programmable ISP Peripherals For 8-bit MCUs

    

    

    

    


    


    

    相關(guān)代理商/技術(shù)參數(shù)
    		

    參數(shù)描述
    		

    
    

    
PSD833F2-90J
功能描述:CPLD - 復雜可編程邏輯器件 5.0V 1M 90ns

 RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100

    

    
PSD833F2-90JI
功能描述:SPLD - 簡單可編程邏輯器件 5.0V 1M 90ns

 RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24

    

    
PSD833F2-90M
功能描述:SPLD - 簡單可編程邏輯器件 5.0V 1M 90ns

 RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24

    

    
PSD833F2-90MI
功能描述:CPLD - 復雜可編程邏輯器件 5.0V 1M 90ns

 RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100

    

    
PSD834F2-15M
 制造商:STMicroelectronics 功能描述:Flash In-System Programmable Peripherals 52-Pin PQFP

    

    
    
    
    
	
    	
    
    
     
     
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