參數(shù)資料
型號(hào)： PSD813F1A-90MT
廠商： 意法半導(dǎo)體
英文描述： Flash In-System Programmable (ISP) Peripherals for 8-bit MCUs, 5V
中文描述： Flash在系統(tǒng)可編程（ISP）的周邊8位MCU，5V的
文件頁(yè)數(shù)： 12/110頁(yè)
文件大?。?/td> 1685K
代理商： PSD813F1A-90MT
PSD813F1
12/110
Note: 1. The pin numbers in this table are for the PLCC package only. See the
Figure 2., page 7
, for pin numbers on other package type.
PC5
13
I/O
PC5 pin of Port C. This port pin can be configured to have the following functions:
1. MCU I/O
–
write to or read from a standard output or input port.
2. CPLD macrocell (McellBC5) output.
3. Input to the PLDs.
4. TDI input
2
for the JTAG Interface.
This pin can be configured as a CMOS or Open Drain output.
PC6
12
I/O
PC6 pin of Port C. This port pin can be configured to have the following functions:
1. MCU I/O
–
write to or read from a standard output or input port.
2. CPLD macrocell (McellBC6) output.
3. Input to the PLDs.
4. TDO output
2
for the JTAG Interface.
This pin can be configured as a CMOS or Open Drain output.
PC7
11
I/O
PC7 pin of Port C. This port pin can be configured to have the following functions:
–
write to or read from a standard output or input port.
2. CPLD macrocell (McellBC7) output.
3. Input to the PLDs.
4. DBE
–
active Low Data Byte Enable input from 68HC912 type MCUs.
This pin can be configured as a CMOS or Open Drain output.
PD0
10
I/O
PD0 pin of Port D. This port pin can be configured to have the following functions:
1. ALE/AS input latches address output from the MCU.
2. MCU I/O
–
write or read from a standard output or input port.
3. Input to the PLDs.
4. CPLD output (External Chip Select).
PD1
9
I/O
PD1 pin of Port D. This port pin can be configured to have the following functions:
1. MCU I/O
–
write to or read from a standard output or input port.
2. Input to the PLDs.
3. CPLD output (External Chip Select).
4. CLKIN
–
clock input to the CPLD macrocells, the APD Unit
’
s Power-down counter, and
the CPLD AND Array.
PD2
8
I/O
PD2 pin of Port D. This port pin can be configured to have the following functions:
1. MCU I/O
–
write to or read from a standard output or input port.
2. Input to the PLDs.
3. CPLD output (External Chip Select).
4. PSD Chip Select Input (CSI). When Low, the MCU can access the PSD memory and I/
O. When High, the PSD memory blocks are disabled to conserve power.
V
CC
15, 38
Supply Voltage
GND
1, 16,
26
Ground pins
Pin Name
Pin
Type
Description
(1)
相關(guān)PDF資料
PDF描述
PSD813F1V Flash In-System Programmable ISP Peripherals For 8-bit MCUs
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PSD813F1A-90U 功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 1M 90ns RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
PSD813F1A-90UI 功能描述:SPLD - 簡(jiǎn)單可編程邏輯器件 5.0V 1M 90ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
PSD813F1A-90UT 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable (ISP) Peripherals for 8-bit MCUs, 5V
PSD813F1AV-12JIT 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable (ISP) Peripherals for 8-bit MCUs, 3.3V
PSD813F1AV-12JT 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable (ISP) Peripherals for 8-bit MCUs, 3.3V
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